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wiki:pc:start
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PC
https://en.wikipedia.org/wiki/List_of_Intel_processors
https://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures
https://en.wikipedia.org/wiki/List_of_Intel_chipsets
https://en.wikipedia.org/wiki/List_of_Intel_codenames
https://linuxreviews.org/The_Massive_Intel_Leak:_The_Files_It_Contains_And_Their_Content
Intel x86 microarchitectures
| Year | Micro-<wbr />architecture | Pipeline stages | Max clock (MHz) |
Process node | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1978 | 8086 (8086, 8088) | 2 | 5| rowspan=2 | 3 µm process nm|
|-|
| 1982|
| Intel 80186 (80186, Intel 80188)|
| 2|
| 25|
|-|
| 1982|
| Intel 80286 (80286)|
| 3|
| 25|
| rowspan=2 | 1.5 µm process nm|
|-|
| 1985|
| Intel 80386 (80386)|
| 6|
| 33|
|-|
| 1989|
| Intel 80486 (80486)|
| 5|
| 100|
| 1 µm process nm|
|-|
| 1993|
| P5 (microarchitecture) (Pentium)|
| 5|
| 200|
| 800 nm process, 600 nm process, 350 nm process nm|
|-|
| 1995|
| P6 (microarchitecture) (Pentium Pro, Pentium II)|
| 14 (17 with load & store/retire)|
| 450|
| 600 nm process, 350, 250 nm process nm|
|-|
| 1997|
| P5 (microarchitecture) (Pentium MMX)|
| 6|
| 233|
| 350 nm|
|-|
| 1999|
| P6 (microarchitecture)#From Pentium Pro to Pentium III (Pentium III)|
| 12 (15 with load & store/retire)|
| 1400|
| 250, 180 nm process, 130 nm process nm|
|-|
| 2000|
| NetBurst (Pentium 4)(Willamette)|
| rowspan=2 | 20 unified with branch prediction|
| 2000|
| 180 nm|
|-|
|2002|
|NetBurst (Pentium 4)(Northwood, Gallatin)|
|3466|
|130 nm|
|-|
| 2003|
| Pentium M (microarchitecture) (Banias, Dothan)Enhanced Pentium M (microarchitecture) (Yonah)|
| 10 (12 with fetch/retire)|
| 2333|
|130, 90 nm process, 65 nm process nm|
|-|
| 2004|
| NetBurst (Pentium 4, Pentium D)(NetBurst#Revisions)|
| 31 unified with branch prediction|
| 3800|
| 90, 65 nm|
|-|
| 2006|
| Intel Core (microarchitecture)|
| rowspan=2 | 12 (14 with fetch/retire)|
| 3000|
| 65 nm|
|-|
| 2007|
| Penryn (microarchitecture) (die shrink)|
| 3333|
| rowspan=3 | 45 nm process nm|
|-|
| rowspan=2 | 2008|
| Nehalem (microarchitecture)|
| 20 unified (14 without miss prediction)|
| 3600|
|-|
| Bonnell (microarchitecture)|
| 16 (20 with prediction miss)|
| 2100|
|-|
| 2010|
| Westmere (microarchitecture) (die shrink)|
| 20 unified (14 without miss prediction)|
| 3866|
| rowspan=3 | 32 nm process nm|
|-|
| rowspan=2 | 2011|
| Saltwell (microarchitecture) (die shrink)|
| 16 (20 with prediction miss)|
| 2130|
|-|
| Sandy Bridge|
| rowspan=2 | 14 (16 with fetch/retire)|
| 4000|
|-|
| 2012|
| Ivy Bridge (microarchitecture) (die shrink)|
| 4100|
| rowspan=3 | 22 nm process nm|
|-|
| rowspan=2 | 2013|
| Silvermont|
| 14–17 (16–19 with fetch/retire)|
| 2670|
|-|
| Haswell (microarchitecture)|
| rowspan=2 | 14 (16 with fetch/retire)|
| 4400|
|-|
| 2014|
| Broadwell (microarchitecture) (die shrink)|
| 3700|
| rowspan=5 | 14 nm process nm|
|-|
| rowspan=2 | 2015|
| Airmont (microarchitecture) (die shrink)|
| 14–17 (16–19 with fetch/retire)|
| 2640|
|-|
| Skylake (microarchitecture)|
| 14 (16 with fetch/retire)|
| 5200|
|-|
| 2016|
| Goldmont|
| 20 unified with branch prediction|
| 2600|
|-|
| 2017|
| Goldmont Plus|
| 20 unified with branch prediction (?)|
| 2800|
|-|
| 2018|
| Cannon Lake (microprocessor)|
| 14 (16 with fetch/retire)|
| 3200|
| rowspan=4 | 10 nm process nm|
|-|
| 2019|
| Sunny Cove (microarchitecture)|
| 14–20 (misprediction)|
| 4100|
|-|
| rowspan=2 | 2020|
| Tremont (microarchitecture)|
| 20 unified |
|3300|
|-|
| Willow Cove|
| 14 unified |
|5300|
|-|
| rowspan=3 | 2021|
| Cypress Cove (microarchitecture) |
| 14 unified |
| 5300|
| 14 nm process nm|
|-|
| Golden Cove |
| 12 unified|
| 5500|
| rowspan=3 | 7 nm process|
|-|
| Gracemont (microarchitecture)|
| 20 unified with misprediction penalty |
| 4300|
|-|
| 2022|
| Raptor Cove|
| 12 unified|
| 6000|
|-|
| rowspan=2 |2023|
|Redwood Cove (microarchitecture)|
||
||
| rowspan=2 |5 nm process|
|-|
| Crestmont (microarchitecture)|
||
||
|-|
|! colspan=5 |Note: Atom/Power efficient microarchitectures are in Italic|
|}|
===== Desktop processors =====
===== PCH ===== ===== Embedded controller ===== https://github.com/intel/ecfw-zephyr ===== BIOS ===== https://www.sentinelone.com/labs/moving-from-common-sense-knowledge-about-uefi-to-actually-dumping-uefi-firmware/ https://edk2-docs.gitbook.io/edk-ii-uefi-driver-writer-s-guide/ https://github.com/LongSoft/UEFITool https://github.com/LongSoft/UEFITool/blob/new_engine/common/guids.csv https://github.com/theopolis/uefi-firmware-parser https://github.com/erocarrera/pefile https://formats.kaitai.io/uefi_te/python.html ===== DEBUG ===== https://github.com/ptresearch/IntelTXE-PoC/blob/master/README.md http://standa-note.blogspot.com/2021/03/debugging-system-with-dci-and-windbg.html ===== APIC ===== https://wiki.osdev.org/APIC Intel® 64 and IA-32 Architectures Software Developer’s Manual |
Volume 1: Basic Architecture | | Volume 2A: Instruction Set Reference, A-L | | Volume 2B: Instruction Set Reference, M-U | | Volume 2C: Instruction Set Reference, V | | Volume 2D:Instruction Set Reference, W-Z | | Volume 3A: System Programming Guide, Part 1 | | Volume 3B: System Programming Guide, Part 2 | | Volume 3C: System Programming Guide, Part 3 | | Volume 3D: System Programming Guide, Part 4 | | Volume 4: Model-Specific Registers | | MultiProcessor Specification |
===== Acronyms ===== https://doc.coreboot.org/acronyms.html |
Authenticated Code Modules | | https://doc.coreboot.org/security/intel/acm.html | | Advanced Configuration and Power Interface | | https://en.wikipedia.org/wiki/ACPI | | After life | UEFI boot phase | | | Active Management Technology | | https://en.wikipedia.org/wiki/Intel_Active_Management_Technology | | Advanced Programmable Interrupt Controller | | https://en.wikipedia.org/wiki/Advanced_Programmable_Interrupt_Controller | | Advanced RISC Machines | | https://en.wikipedia.org/wiki/ARM_architecture_family | | Boot Device Selection | UEFI boot phase | | | Boot Firmware Volume | UEFI | | | Basic Input/Output System | | https://en.wikipedia.org/wiki/BIOS | | Best Known Configuration | | | | Baseboard management controller | | https://en.wikipedia.org/wiki/Intelligent_Platform_Management_Interface#Baseboard_management_controller | | Balanced Technology Extended Interface | intel | | | Cache-as-RAM | | | | coreboot file system | coreboot | | | Intel® Clock Commander | Tool found in BKC Intel® CSME kit | | | | | | | Central processing unit | | https://en.wikipedia.org/wiki/Central_processing_unit | | Converged Security and Management Engine | intel | | | Direct Media Interface | intel | https://en.wikipedia.org/wiki/Direct_Media_Interface | | digital thermal sensors | | | | The Driver Execution Environment | UEFI boot phase | | | Embedded controller | | https://en.wikipedia.org/wiki/Embedded_controller | | End-of-POST | Message | | | Flexible Display Interface | intel | https://en.wikipedia.org/wiki/Flexible_Display_Interface | | Firmware File System | UEFI | | | Intel® Flash Image Tool | intel | | | firmware volume | UEFI | | | | | | | Globally Unique Identifier | | | | Host Embedded Controller Interface | | https://en.wikipedia.org/wiki/Host_Embedded_Controller_Interface | | Human interface device | | https://en.wikipedia.org/wiki/Human_interface_device | | | intel HLK Validation | | | Hand-Off Block | | | | High Speed Input/Output | | | | Initial Boot Block | coreboot | https://doc.coreboot.org/security/intel/txt_ibb.html | | I/O Controller Hub | | https://en.wikipedia.org/wiki/I/O_Controller_Hub | | Independent Loading Mechanism | intel mb | | | Intel Online Connect | | | | Instructions per cycle | | https://en.wikipedia.org/wiki/Instructions_per_cycle | | Interrupt request | | https://en.wikipedia.org/wiki/Interrupt_request_(PC_architecture) | | interrupt and timer subsystem | | | | Keepout Zones | intel mb | | | | | | | Intel Management Engine | | https://en.wikipedia.org/wiki/Intel_Management_Engine | | Microprocessor without Interlocked Pipelined Stages | | https://en.wikipedia.org/wiki/MIPS_architecture | | Memory management unit | | https://en.wikipedia.org/wiki/Memory_management_unit | | On Package DMI interconnect Interface | | | | Platform Controller Hub | | https://en.wikipedia.org/wiki/Platform_Controller_Hub | | Platform Component List | intel | | | Intel® Platform Configuration Tool | | | | Power Delivery | | | | Portable Executable | file format | | | Platform Environment Control Interface | | https://en.wikipedia.org/wiki/Platform_Environment_Control_Interface | | The Pre-EFI Initialization | UEFI boot phase | | | Pre-EFI Initialization Module | UEFI | | | | | | | Power Management Controller | intel | | | PEIM-to-PEIM Interface | UEFI | | | Production Version | | | | runtime | UEFI boot phase | | | System Controller Hub | | https://en.wikipedia.org/wiki/System_Controller_Hub | | Security phase | | | | Stock Keeping Unit | common | | | Serial Peripheral Interface | common | https://en.wikipedia.org/wiki/Serial_Peripheral_Interface | | Terse Executable | UEFI file format is a stripped-down version of the PE format | https://uefi.org/sites/default/files/resources/PI_Spec_1_6.pdf | | Trusted Platform Module | | | | Transient System Load | UEFI boot phase | | | Intel Trusted Execution Technology | | https://doc.coreboot.org/security/intel/txt.html | | Unified Extensible Firmware Interface | | https://en.wikipedia.org/wiki/UEFI | | Intel® Validation Internet Portal | | |
wiki/pc/start.1708248585.txt.gz · Последнее изменение: — Roman Abakumov
Инструменты страницыЕсли не указано иное, содержимое этой вики предоставляется на условиях следующей лицензии: CC Attribution-Share Alike 4.0 International
 
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