All connections with the external world come through this motherboard, which provide also the required voltage to modules, deriving it from its power supply source.

This board implement the routing of the interface signals Qseven module to external standard connectors.

For correct operation this board need external +12VDC power supply.

Input Voltage: 12V.

All remaining voltages needed for board’s working are generated internally from +12VDC power rail.

Board dimensions are: 147 x 101.60 mm.

Printed circuit of the board is made of 6 layers, some of them are ground planes, for disturbance rejection.

Over current protection, power supply filtering and ESD protection is provided.

Q7_Base can offer externally four PCI Express lane, which are directly managed by external Q7-module.
PCI express Gen 3.0 (8Gbps) is supported.
Here following the signals involved in PCI express management:

Q7-Base offers one UART interface.
Here following the signals related to UART interface:

Here following the signals involved in PCI express management

There are two SATA interface on Q7_Base, but it is available only one.
Here following the signals related to SATA interface:

SDI/O port #1 can work in 1-bit and 4-bit.

Signals involved with SDI/O interface are the following:

Here following the signals related to USB interfaces.

Signals involved with CAN interface are the following:

Signals involved with SPI management are the following:

It is available two LVDS channels, each one consisting of 1 clock pair and four data pairs.

It is possible to configure LVDS (in Q7 module) output so that it can be used as: One single channel, Two identical single channel outputs, Two independent single channel outputs.

Here following the signals related to LVDS management:

The signals related to Audio interface:

By using HDMI interface along with two LVDS single channel interfaces, it is possible to drive up to 3 independent displays.

Signals involved in HDMI management are the following:

The Low Pin Count (LPC) bus interface is a cost-efficient, low-speed interface designed to support low-speed legacy devices such as a Super I/O controller or a firmware hub device.

There are 8 pins that can be used for implementation of Low Pin Count (LPC) Bus interface or as General Purpose I/Os (GPIO).

When the Q7 module is programmed for LPC Interface, following signals will be available:

When the Q7 module is programmed for GPIOs, all previous signals are not available and corresponding pins on Qseven connector are General Purpose I/Os, bidirectional signals at +3.3V electrical level.

Signals involved with I2C interface are the following:

There is a set of signals that are used to manage the power rails and power states.

The signals involved are:

This pins are reserved for manufacturing and debugging purposes.

The Q7_Base provides connection to the Serial Peripheral Interface (SPI) Bus via connector X13, SPI signals are connected to Q7 connector.

The 10 pin socket can be used for connection for external interface - SPI EEPROM and Serial Flash devices. For example, you can a 3.3V serial flash in the socket to boot the system from external BIOS.

SPI Connector

Function	SPI Connector
Location	X13
P/N	PLD-10
Pinout	Pin	Description
	1	SPI_MOSI
	2	GND
	3	SPI_MISO
	4	GND
	5	SPI_SCK
	6	GND
	7	SPI_CS1
	8	GND
	9	SPI_CS0
	10	GND

Three I2C interfaces is available on Q7_Base: 2x I2C Q7_module to Q7_Base, 1x I2C MCU (STM8) Q7_Base control (see MCU).

I2C Connector

Function	I2C Connector
Location	X11
P/N	PLD-10
Pinout	Pin	Description
	1	I2C1_SMB_SCL
	2	GND
	3	I2C1_SMB_SDA
	4	GND
	5	SMB_ALERT#
	6	GND
	7	I2C0_SCL
	8	GND
	9	I2C0_SDA
	10	GND

To support LPC and GPIO devices, the LPC and GPIO signals are shared on the Q7_Base from Q7 module. The shared signals are connected to pin header X12.

This header can be used for debugging or to connect devices such as Super I/O for evaluation.

LPC/GPIO Connector

Function	LPC/GPIO Connector
Location	X12
P/N	PLD-10
Pinout	Pin	Description
	1	LPC_GPIOX8_LDRQ#
	2	LPC_GPIOX8_AD1
	3	LPC_GPIOX8_AD3
	4	LPC_GPIOX8_AD0
	5	LPC_GPIOX8_FRAME#
	6	GND
	7	LPC_GPIOX8_AD2
	8	LPC_GPIOX8_CLK
	9	LPC_GPIOX8_SERIRQ
	10	GND

HDMI signals are shared on the Q7_Base devices (using connector X20) from Q7 module (X4).

For high-speed electrostatic discharge (ESD) transient voltage suppression (TVS) is used High Definition Multimedia Interface (HDMI) device TPD12S016 with auto-direction sensing I2C voltage level shift buffers, with integrated protection diodes, with current limited 5-V output HDMI power line and with reverse current blocking when the system is powered off.

This connector provides data and power connection between the Q7_Base and the Display.

The Q7_Base supports two LVDS panels can be used at the same time.
The Q7_Base has two LVDS ports, A and B, which can either be used for one panel with up to 165 Mpixel/s or as two separate ports up to 85 Mpixel/s. In either configuration, the Qseven specification only provides one set of backlight and panel power enable signals as well as one brightness control signal for both of them.

The panel can be enabled with he LVDS_PPEN signal and the backlight can be switched on with LVDS_BLEN.

Connection one display to port A. LVDS_B signals are not used.

In this option connection LVDS_A and LVDS_B signals to the connector X19.

Connection two LVDS panels. Panel 1 – the primary one – is connected to port A with its corresponding panel power enable signal and the associated backlight enable signal.

This connector provides data and power connection between the Q7_Base and the Display.

LVDS Connector

Function	LVDS Connector
Location	X19
P/N	B34B-PHDSS_ JST Sales America Inc.
Pinout	Pins	Name	Pins	Name
	1	LVDS_DID_SCL	18	LVDS_BLT_CTRL
	2	LVDS_DID_SDA	19	GND
	3	3V3	20	LVDS_A_D3_N
	4	3V3	21	LVDS_B_D0_P
	5	LVDS_A_D0_N	22	LVDS_B_D0_N
	6	GND	23	LVDS_B_D1_N
	7	LVDS_PPEN	24	GND
	8	LVDS_A_D0_P	25	GND
	9	LVDS_A_D1_P	26	LVDS_B_D1_P
	10	LVDS_A_D1_N	27	LVDS_B_D2_P
	11	LVDS_A_D2_P	28	LVDS_B_D2_N
	12	LVDS_BLEN	29	LVDS_B_CLK_P
	13	eDP0_HPD	30	GND
	14	LVDS_A_D2_N	31	eDP1_HPD
	15	LVDS_A_CLK_P	32	LVDS_B_CLK_N
	16	LVDS_A_CLK_N	33	LVDS_B_D3_N
	17	LVDS_A_D3_P	34	LVDS_B_D3_P

Connector X24 on Q7_Base is a 5-pin header designated for backlight voltage. Supply voltage for the backlight converter can be set to +12V or +5V.

Fuses F1 (12VINT) and F2 (5V) are additionally installed on the power circuit.

Four USB interfaces is available on Q7_Base: 3xUSB 3.0, 1xUSB 2.0.

USB port #0, #1, #2, along with the Superspeed USB port #0, #1, #2, are carried to a standard USB 3.0 Type A receptacle.

USB port #3 are carried out to standard USB 2.0 Type A receptacles.

Debug console (USB to UART bridge) are carried out to standard USB 2.0 Type B receptacles.

For EMI/ESD protection and overcurrent protection, USB Switch, TVS and ESD Diodes are used on USB data and voltage lines.

USB Host 3 signals from the Q7 connector is connected to standard USB Type-A connector.

For converting UART to USB used a USB-to-Dual-UART Bridge Controller CP2105 (U2). The CP2105 includes a USB 2.0 fullspeed function controller, USB transceiver, oscillator, one-time programmable ROM, and two asynchronous serial data buses (UART) with full modem control signals.
For asynchronous communication between two data buses is used dual-bit noninverting bus transceiver with two separate configurable power-supply rails the SN74AVC (U3).

For connection to standard serial ports (like those offered by common PCs, for example) it is include RS-232 transceiver ST3232EB_ (U25) and RS-485 transceiver ADM3491EAR_ (U24) on the board.

Jumpers for RS-232\RS485\RS422 selection

where “+“ means Populated, “- “ - Not Populated

Jumpers for RS-485\RS422 selection and options

To suppress reflection at the end of the line, it is recommended to add termination resistors between signal pairs at both ends of the cable.
The Q7_Base have on board termination resistors that can be enabled through jumpers, so if a device is placed at one of the ends of the cable place jumpers on required position.

When adding termination to the line, no more than two resistors should be used, one at each end of the line.

To connect Qseven CAN interface (Q7 module) to CAN Bus on Q7_Base, it is integrate a CAN Bus Transceiver TJA1051T/3,118 (NXP ) on the board.

CAN Connector port 0

Function	CAN Connector port 0
Location	X23
P/N	15EDGRC-3.5-03 DEGSON
Pinout	Pin	Description
	1	CANH_0
	2	GND
	3	CANL_0

CAN Bus connection is made through a pluggable terminal block (15EDGRC-3.5-03 Degson). 120Ω resistor is placed for line termination, in case that the system is placed to one of the two extremities of CAN Line. Jumper X22 enables or disables CAN bus termination.

To connect Qseven module to CAN Bus on Q7_Base, it is integrate a CAN Controller MCP2515-I/ML (MICROCHIP) (use SPI interface) and Bus Transceiver TJA1051T/3,118 (NXP ) on the board.

CAN Connector port 1

Function	CAN Connector port 1
Location	X48
P/N	15EDGRC-3.5-03 DEGSON
Pinout	Pin	Description
	1	CANH_1
	2	GND
	3	CANL_1

CAN Bus connection is made through a pluggable terminal block (15EDGRC-3.5-03 Degson). 120Ω resistor is placed for line termination, in case that the system is placed to one of the two extremities of CAN Line. Jumper X7 enables or disables CAN bus termination.

Q7_Base provides one Inter-IC Sound(I2S) interface, through audio CODEC IC SGTL5000 with I2S interface.

From the codec, 1 microphone input or Line in (MP3/FM) Input, 1 headphone output or Line out (Speaker Amp/Docking Station/FMTX) are available.

The board provides two jack audio connectors for input and output.

5 jumpers are used to switch alternative inputs and outputs.

3 position jumpers view

Position	Jumpers view
1-2
2-3

Jumpers for Line selection and options

The Q7_Base is equipped with a RJ45 connector with integrated magnetics to support Gigabit Ethernet on the X9, X10 connectors. Additionally, LED indicators are integrated within the LAN connectors.

The PCIe v2.1 (2.5GT/s) Interface is used by the WGI210ITSLJX as a host interface. The interface only supports the PCIe v2.1 (2.5GT/s) rate and is configured to x1. For communication between Controller on Q7 module and the WGI210 used SMBus interface (see paragraph I2C for more details).

The WGI210 use an external SPI serial interface to a Flash W25Q16JVZPIQ (U21) for storing product configuration information and a boot ROM device.

The WGI210 uses a 100 MHz differential reference clock. This signal is generated on U23 (SI53152-A01AGM_) and routed to U22 (WGI210ITSLJX) .

The WGI210 implements three output drivers used for driving external LED circuits on X10 connector.

Ethernet port 2

Function	Gigabit Ethernet Connector
Location	X10
P/N	TRJG16464ADNL TRXCOM
Pinout	Pin	Description
	1	GBE1_MDI0_P
	2	GBE1_MDI0_N
	3	GBE0_MDI1_P
	4	GBE1_MDI2_P
	5	GBE1_MDI2_N
	6	GBE1_MDI1_N
	7	GBE1_MDI3_P
	8	GBE1_MDI3_N

The Q_Base is equipped with a PCI Express Mini Card socket, connector provide the ability to insert different removable PCI Express Mini Cards. The PCI Express Mini Card utilizes PCI Express link 0.

PCIE Slot

Function	PCIE Slot
Location	X1
P/N	MDT420M02001 AMPHENOL
Pinout	Pin	Description	Pin	Description
	1	GND	36	NC
	2	3V3_SSD_SATA	37	NC
	3	GND	38	DEV_SLEEP_DATA
	4	3V3_SSD_SATA	39	GND
	5	NC	40	NC
	6	NC	41	SATA_B_P
	7	NC	42	NC
	8	NC	43	SATA_B_N
	9	GND	44	NC
	10	M2_LED_SATA	45	GND
	11	NC	46	NC
	12	3V3_SSD_SATA	47	SATA_A_N
	13	NC	48	NC
	14	3V3_SSD_SATA	49	SATA_A_P
	15	GND	50	NC
	16	3V3_SSD_SATA	51	GND
	17	NC	52	NC
	18	3V3_SSD_SATA	53	NC
	19	NC	54	NC
	20	NC	55	NC
	21	GND	56	NC
	22	NC	57	GND
	23	NC	58	NC
	24	NC	67	NC
	25	NC	68	NC
	26	NC	69	PEDET_SATA
	27	GND	70	3V3_SSD_SATA
	28	NC	71	GND
	29	NC	72	3V3_SSD_SATA
	30	NC	73	GND
	31	NC	74	3V3_SSD_SATA
	32	NC	75	GND
	33	GND	76	S (GND)
	34	NC	77	S (GND)
	35	NC

The Q7_Base provides one SD/MMC socket (X3).

The SD Card slot can be configured as SD or MMC card operation. The SD Card Slot can support SDIO cards designed to fit in a standard SD card slot. The main power for the Card Socket is 3.3V.

SD Card Socket

Function	SD Card Socket
Location	X3
P/N	DM3AT-SF-PEJM5 HIROSE
Pinout	Pin	Description
	1	DAT2
	2	CD/DAT3
	3	CMD
	4	VDD
	5	CLK
	6	VSS
	7	DAT0
	8	DAT1
	9	CD_A
	10	CD_B

The Q7_Base provides the ability to connect 3.3V cooling fans for the CPU module and system.
Connector X14 is for 4pin fan. The FAN_TACHOIN signal originates from the Q7 module.

Connectors are provided for debugging/development purpose.

Q7_Base provides a USB Connector (UART) and JTAG connector for debugging. Both debug interfaces are sharing same signals from Q7 connector, since MFG_NCN4_MUX select line is used to select either UART or JTAG.
Q7_Base provided jumper X25 to select Debug ports. In default jumper will be on UART. A 10-pin JTAG connector is provided on the Q7_Base.

UART will be used for Debug purpose. This is not the full functional UART and supports only Serial TX and RX signals.

Connector X21 allows a debugging or programming tool to be connected to the MCU STM8 (U18).

You can configure board to match the needs of your application by setting jumpers.

This signal used to disable standard boot firmware flash device and enable an alternative boot firmware source, for example a boot loader.

The Q7_Base performs a power up sequence when you press this button. The power button is connected to the Q7 module’s PWRBTN# signal.

When you press this button, the Q7 module and all components connected on board will perform a hard reset. The reset button is connected to the Q7 module’s RSTBTN# signal.

The recharge lithium smd battery supplies power to the RTC and memory of the Q7 module. The battery provide 3V of power. It is possible to disconnect battery by unsoldering the resistor R100 (0 Ohm).

The 8-bit microcontroller STM8S (U18) with 64 Kbytes Flash program memory is designed for detect the occurrence of fault, generated by external interference and used to resolve processor malfunctions due to hardware or software failures (watchdog).

The microcontroller uses the I2C bus to communicate the temperature sensor TMP102 (U19) and DCDC TPS53819 (U27).

The single wire interface module (SWIM) permits non-intrusive, real-time incircuit debugging and fast memory programming.

The TMP102 (U19) is a digital temperature sensor with SMBus alert function from Texas Instruments. TMP102 uses the I2C bus to communicate the temperature on STM8 (U18) and runs from 3.3V. The TMP102 is capable of reading temperatures to a resolution of 0.0625°C (on-chip 12-bit ADC), and is accurate up to 0.5°C.
The default address is 0x49 (1001001).

The Si53152 (U23) is a spread spectrum tolerant PCIe clock buffer that source two PCIe (CLK0 and CLK1) clocks simultaneously. The device has two hardware output enable inputs (CLK_EN0, CLK_EN1) for enabling the respective differential outputs on the fly. The device also features output enable control through I2C communication (Q7 module).

TCA6424A (U33) is 24-bit I/O expander for the two-line bidirectional bus (I2C) is designed to provide remote I/O expansion via the I2C interface.
The default address is 0100011.

There are three green LEDs D1-D3 (LNJ347W83RA PANASONIC) on the Q7_Base.

This is programmable MCU user LED.

Led D2 indicates that all power rails located on the board are ready for use.

User led D3 connects to custom signal and used as GPIO.