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PC

https://en.wikipedia.org/wiki/List_of_Intel_processors

https://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures

https://en.wikipedia.org/wiki/List_of_Intel_chipsets

https://en.wikipedia.org/wiki/List_of_Intel_codenames

https://linuxreviews.org/The_Massive_Intel_Leak:_The_Files_It_Contains_And_Their_Content

Intel x86 microarchitectures

x86 microarchitectures
Year Micro-<wbr />architecture Pipeline stages Max
clock
(MHz)		 Process node
1978 8086 (8086, 8088) 2 5 3000 nm
1982 186 (80186, 80188) 2 25
1982 286 (80286) 3 25 1500 nm
1985 386 (80386) 6 33
1989 486 (80486) 5 100 1000 nm
1993 P5 (Pentium) 5 200 800, 600, 350 nm
1995 P6 (Pentium Pro, Pentium II) 14 (17 with load & store/retire) 450 500, 350, 250 nm
1997 P5 (Pentium MMX) 6 233 350 nm
1999 P6 (Pentium III) 12 (15 with load & store/retire) 1400 250, 180, 130 nm
2000 NetBurst (Pentium 4)
(Willamette)		 20 unified with branch prediction 2000 180 nm
2002 NetBurst (Pentium 4)
(Northwood, Gallatin)		 3466 130 nm
2003 Pentium M (Banias, Dothan)
Enhanced Pentium M (Yonah)		 10 (12 with fetch/retire) 2333 130, 90, 65 nm
2004 NetBurst (Pentium 4, Pentium D)
(Prescott)		 31 unified with branch prediction 3800 90, 65 nm
2006 Intel Core 12 (14 with fetch/retire) 3000 65 nm
2007 Penryn (die shrink) 3333 45 nm
2008 Nehalem 20 unified (14 without miss prediction) 3600
Bonnell 16 (20 with prediction miss) 2100
2010 Westmere (die shrink) 20 unified (14 without miss prediction) 3866 32 nm
2011 Saltwell (die shrink) 16 (20 with prediction miss) 2130
Sandy Bridge 14 (16 with fetch/retire) 4000
2012 Ivy Bridge (die shrink) 4100 22 nm
2013 Silvermont 14–17 (16–19 with fetch/retire) 2670
Haswell 14 (16 with fetch/retire) 4400
2014 Broadwell (die shrink) 3700 14 nm
2015 Airmont (die shrink) 14–17 (16–19 with fetch/retire) 2640
Skylake 14 (16 with fetch/retire) 5200
2016 Goldmont 20 unified with branch prediction 2600
2017 Goldmont Plus 20 unified with branch prediction (?) 2800
2018 Palm Cove 14 (16 with fetch/retire) 3200 10 nm
2019 Sunny Cove 14–20 (misprediction) 4100
2020 Tremont 20 unified 3300
Willow Cove 14 unified 5300
2021 Cypress Cove 14 unified 5300 14 nm
Golden Cove 12 unified 5500 Intel 7
Gracemont 20 unified with misprediction penalty 4300
2022 Raptor Cove 12 unified 6000
2023 Redwood Cove Intel 4
Crestmont
Note: Atom/Power efficient microarchitectures are in Italic

Desktop processors

Codename Desktop Name Socket Name Gen
SKL Sky Lake LGA 1151
LGA 2066
LGA 3647 		6
KBL Kaby Lake LGA 1151
LGA 2066 		7
CFL Coffe Lake LGA 1151 8
CFL Coffe Lake Refresh LGA 1151 9
CML Comet Lake LGA 1200 10
RKL Rocket Lake LGA 1200 11
ADL Alder Lake LGA 1700 12
RPL Raptor Lake LGA 1700 13

PCH

PCH Name Chipset Series
Ibex Peak 5 Lynnfield and Clarkdale https://en.wikipedia.org/wiki/Intel_5_Series
Cougar Point 6 Sandy Bridge https://en.wikipedia.org/wiki/LGA_1155#Sandy_Bridge_family_of_chipsets
Panther Point 7 Ivy Bridge https://en.wikipedia.org/wiki/LGA_1155#Ivy_Bridge_family_of_chipsets
Lynx Point 8/9 Haswell / Broadwell https://en.wikipedia.org/wiki/LGA_1150#Haswell_chipsets
Sunrise Point 100 Sky Lake https://en.wikipedia.org/wiki/LGA_1151#Skylake_chipsets_(100_series)
Union Point 200 Kaby Lake https://en.wikipedia.org/wiki/LGA_1151#Kaby_Lake_chipsets_(200_series)
Cannon Point 300 Coffee Lake https://en.wikipedia.org/wiki/LGA_1151#Coffee_Lake_chipsets_(300_series_and_C240_series)
400 Comet Lake https://en.wikipedia.org/wiki/LGA_1200#Comet_Lake_chipsets_(400_series)
500 Rocket Lake https://en.wikipedia.org/wiki/LGA_1200#Rocket_Lake_chipsets_(500_series)
600 Alder Lake https://en.wikipedia.org/wiki/LGA_1700#Alder_Lake_chipsets_(600_series)
700 Raptor Lake https://en.wikipedia.org/wiki/LGA_1700#Raptor_Lake_chipsets_(700_series)

Embedded controller

https://github.com/intel/ecfw-zephyr

BIOS

https://www.sentinelone.com/labs/moving-from-common-sense-knowledge-about-uefi-to-actually-dumping-uefi-firmware/

https://malware.news/t/moving-from-manual-reverse-engineering-of-uefi-modules-to-dynamic-emulation-of-uefi-firmware/43799

https://edk2-docs.gitbook.io/edk-ii-uefi-driver-writer-s-guide/

https://github.com/LongSoft/UEFITool

https://github.com/LongSoft/UEFITool/blob/new_engine/common/guids.csv

https://github.com/theopolis/uefi-firmware-parser

https://github.com/erocarrera/pefile

https://formats.kaitai.io/uefi_te/python.html

https://github.com/intel/FSP

DEBUG

https://github.com/ptresearch/IntelTXE-PoC/blob/master/README.md

http://standa-note.blogspot.com/2021/03/debugging-system-with-dci-and-windbg.html

APIC

https://wiki.osdev.org/APIC

Intel® 64 and IA-32 Architectures Software Developer’s Manual

Volume 1: Basic Architecture
Volume 2A: Instruction Set Reference, A-L
Volume 2B: Instruction Set Reference, M-U
Volume 2C: Instruction Set Reference, V
Volume 2D:Instruction Set Reference, W-Z
Volume 3A: System Programming Guide, Part 1
Volume 3B: System Programming Guide, Part 2
Volume 3C: System Programming Guide, Part 3
Volume 3D: System Programming Guide, Part 4
Volume 4: Model-Specific Registers
MultiProcessor Specification

Acronyms

https://doc.coreboot.org/acronyms.html

ACM Authenticated Code Modules https://doc.coreboot.org/security/intel/acm.html
ACPI Advanced Configuration and Power Interface https://en.wikipedia.org/wiki/ACPI
AL After life UEFI boot phase
AMT Active Management Technology https://en.wikipedia.org/wiki/Intel_Active_Management_Technology
APIC Advanced Programmable Interrupt Controller https://en.wikipedia.org/wiki/Advanced_Programmable_Interrupt_Controller
ARM Advanced RISC Machines https://en.wikipedia.org/wiki/ARM_architecture_family
BDS Boot Device Selection UEFI boot phase
BFV Boot Firmware Volume UEFI
BIOS Basic Input/Output System https://en.wikipedia.org/wiki/BIOS
BKC Best Known Configuration
BMC Baseboard management controller https://en.wikipedia.org/wiki/Intelligent_Platform_Management_Interface#Baseboard_management_controller
BTX Balanced Technology Extended Interface intel
CAR Cache-as-RAM
CBFS coreboot file system coreboot
CCT Intel® Clock Commander Tool found in BKC Intel® CSME kit
CDI
CPU Central processing unit https://en.wikipedia.org/wiki/Central_processing_unit
CSME Converged Security and Management Engine intel
DMI Direct Media Interface intel https://en.wikipedia.org/wiki/Direct_Media_Interface
DTS digital thermal sensors
DXE The Driver Execution Environment UEFI boot phase
EC Embedded controller https://en.wikipedia.org/wiki/Embedded_controller
EOP End-of-POST Message
FDI Flexible Display Interface intel https://en.wikipedia.org/wiki/Flexible_Display_Interface
FFS Firmware File System UEFI
FIT Intel® Flash Image Tool intel
FV firmware volume UEFI
GOP
GUID Globally Unique Identifier
HECI Host Embedded Controller Interface https://en.wikipedia.org/wiki/Host_Embedded_Controller_Interface
HID Human interface device https://en.wikipedia.org/wiki/Human_interface_device
HLK intel HLK Validation
HOB Hand-Off Block
HSIO High Speed Input/Output
IBB Initial Boot Block coreboot https://doc.coreboot.org/security/intel/txt_ibb.html
ICH I/O Controller Hub https://en.wikipedia.org/wiki/I/O_Controller_Hub
ILM Independent Loading Mechanism intel mb
IOC Intel Online Connect
IPC Instructions per cycle https://en.wikipedia.org/wiki/Instructions_per_cycle
IRQ Interrupt request https://en.wikipedia.org/wiki/Interrupt_request_(PC_architecture)
ITSS interrupt and timer subsystem
KOZ Keepout Zones intel mb
KSC
ME Intel Management Engine https://en.wikipedia.org/wiki/Intel_Management_Engine
MIPS Microprocessor without Interlocked Pipelined Stages https://en.wikipedia.org/wiki/MIPS_architecture
MMU Memory management unit https://en.wikipedia.org/wiki/Memory_management_unit
OPI On Package DMI interconnect Interface
PCH Platform Controller Hub https://en.wikipedia.org/wiki/Platform_Controller_Hub
PCL Platform Component List intel
PCT Intel® Platform Configuration Tool
PD Power Delivery
PE Portable Executable file format
PECI Platform Environment Control Interface https://en.wikipedia.org/wiki/Platform_Environment_Control_Interface
PEI The Pre-EFI Initialization UEFI boot phase
PEIM Pre-EFI Initialization Module UEFI
PFAT
PMC Power Management Controller intel
PPI PEIM-to-PEIM Interface UEFI
PV Production Version
RT runtime UEFI boot phase
SCH System Controller Hub https://en.wikipedia.org/wiki/System_Controller_Hub
SEC Security phase
SKU Stock Keeping Unit common
SPI Serial Peripheral Interface common https://en.wikipedia.org/wiki/Serial_Peripheral_Interface
TE Terse Executable UEFI file format is a stripped-down version of the PE format https://uefi.org/sites/default/files/resources/PI_Spec_1_6.pdf
TPM Trusted Platform Module
TSL Transient System Load UEFI boot phase
TXT Intel Trusted Execution Technology https://doc.coreboot.org/security/intel/txt.html
UEFI Unified Extensible Firmware Interface https://en.wikipedia.org/wiki/UEFI
VIP Intel® Validation Internet Portal
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wiki/pc/start.1708248585.txt.gz · Последнее изменение: 2024/02/18 12:29 — Roman Abakumov

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