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PC

Desktop processors

Codename Desktop Name Socket Name Gen
SKL Sky Lake LGA 1151
LGA 2066
LGA 3647
6
KBL Kaby Lake LGA 1151
LGA 2066
7
CFL Coffe Lake LGA 1151 8
CFL Coffe Lake Refresh LGA 1151 9
CML Comet Lake LGA 1200 10
RKL Rocket Lake LGA 1200 11
ADL Alder Lake LGA 1700 12
RPL Raptor Lake LGA 1700 13

PCH

Acronyms

https://doc.coreboot.org/acronyms.html

ACM Authenticated Code Modules https://doc.coreboot.org/security/intel/acm.html
ACPI Advanced Configuration and Power Interface https://en.wikipedia.org/wiki/ACPI
AL After life UEFI boot phase
APIC Advanced Programmable Interrupt Controller https://en.wikipedia.org/wiki/Advanced_Programmable_Interrupt_Controller
ARM Advanced RISC Machines https://en.wikipedia.org/wiki/ARM_architecture_family
BDS Boot Device Selection UEFI boot phase
BFV Boot Firmware Volume UEFI
BIOS Basic Input/Output System https://en.wikipedia.org/wiki/BIOS
BKC Best Known Configuration
BTX Balanced Technology Extended Interface intel
CAR Cache-as-RAM
CBFS coreboot file system coreboot
CCT Intel® Clock Commander Tool found in BKC Intel® CSME kit
CDI
CPU Central processing unit https://en.wikipedia.org/wiki/Central_processing_unit
CSME Converged Security and Management Engine intel
DMI Direct Media Interface intel https://en.wikipedia.org/wiki/Direct_Media_Interface
DXE The Driver Execution Environment UEFI boot phase
EC Embedded controller https://en.wikipedia.org/wiki/Embedded_controller
EOP End-of-POST Message
FDI Flexible Display Interface intel https://en.wikipedia.org/wiki/Flexible_Display_Interface
FFS Firmware File System UEFI
FIT Intel® Flash Image Tool intel
FV firmware volume UEFI
GOP
GUID Globally Unique Identifier
HID Human interface device https://en.wikipedia.org/wiki/Human_interface_device
HLK intel HLK Validation
HOB Hand-Off Block
HSIO High Speed Input/Output
IBB Initial Boot Block coreboot https://doc.coreboot.org/security/intel/txt_ibb.html
ICH I/O Controller Hub https://en.wikipedia.org/wiki/I/O_Controller_Hub
ILM Independent Loading Mechanism intel mb
IOC Intel Online Connect
IPC Instructions per cycle https://en.wikipedia.org/wiki/Instructions_per_cycle
IRQ Interrupt request https://en.wikipedia.org/wiki/Interrupt_request_(PC_architecture)
ITSS interrupt and timer subsystem
KOZ Keepout Zones intel mb
KSC
ME Intel Management Engine https://en.wikipedia.org/wiki/Intel_Management_Engine
MIPS Microprocessor without Interlocked Pipelined Stages https://en.wikipedia.org/wiki/MIPS_architecture
MMU Memory management unit https://en.wikipedia.org/wiki/Memory_management_unit
OPI On Package DMI interconnect Interface
PCH Platform Controller Hub https://en.wikipedia.org/wiki/Platform_Controller_Hub
PCL Platform Component List intel
PCT Intel® Platform Configuration Tool
PD Power Delivery
PE Portable Executable file format
PEI The Pre-EFI Initialization UEFI boot phase
PEIM Pre-EFI Initialization Module UEFI
PFAT
PMC Power Management Controller intel
PPI PEIM-to-PEIM Interface UEFI
PV Production Version
RT runtime UEFI boot phase
SCH System Controller Hub https://en.wikipedia.org/wiki/System_Controller_Hub
SEC Security phase
SKU Stock Keeping Unit common
SPI Serial Peripheral Interface common https://en.wikipedia.org/wiki/Serial_Peripheral_Interface
TE Terse Executable UEFI file format is a stripped-down version of the PE format https://uefi.org/sites/default/files/resources/PI_Spec_1_6.pdf
TPM Trusted Platform Module
TSL Transient System Load UEFI boot phase
TXT Intel Trusted Execution Technology https://doc.coreboot.org/security/intel/txt.html
UEFI Unified Extensible Firmware Interface https://en.wikipedia.org/wiki/UEFI
VIP Intel® Validation Internet Portal

BIOS

wiki/pc/start.1673185004.txt.gz · Последнее изменение: 2023/01/08 16:36 — Roman Abakumov