NMS-CS-IMX8MINI v2 ds-en []

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====== NMS-CS-IMX8MINI v2 ds-en ======
{{ boards:nms-cs-imx8mini:v2_ru:imx8mini_v2.jpg?nolink&480 }}

System on Module NMS-CS-IMX8MINI-V2 is based on an ARM archtecture proccessor NXP i.MX8M Mini.

<pagebreak>

===== Technical Specifications =====

<table main_tech_specs 1200px>
<caption> Main technical specifications </caption>
{{tablelayout?rowsHeaderSource=Auto}}
^ Form factor           | three 90-pins mezzanine connectors Hirose DF40C                                                                                     |
^ CPU                   | Series: i.MX8M Mini ([[https://www.nxp.com/docs/en/data-sheet/IMX8MMIEC.pdf|MIMX8MM6CVTKZAA]])                                     |
| :::                   | Number of Cores/Core Processor: 4 x ARM Cortex A53, 1 x ARM Cortex-M4F                                                              |
| :::                   | 32 KB, 32 KB (instruction,data) L1 Cache                                                                                            |
| :::                   | 512 KB unified L2 Cache                                                                                                             |
| :::                   | Operating Frequency [Max] 1.6 GHz                                                                                                   |
^ RAM                   | LPDDR4 16 GB, interface 32-bit  ([[https://www.samsung.com/semiconductor/dram/lpddr4/K4F6E3S4HM-MGCJ/|K4F6E3S4HM-MGCJ000]])         |
^ FLASH                 | eMMC FLASH 16 GB ([[https://business.kioxia.com/en-us/memory/mlc-nand/emmc.html|THGAMRG7T13BAIL]])                                  |
^ EEPROM                | I2C serial EEPROM 2 KB, Unique ID 48 bit ([[http://ww1.microchip.com/downloads/en/devicedoc/20002124g.pdf|24AA025]])                |
^ Power management IC   | PMIC ([[https://fscdn.rohm.com/en/products/databook/datasheet/ic/power/switching_regulator_system/bd71847amwv-e.pdf|BD71847AMWV]])  |
^ Other components      | WIFI ([[https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf|WF200C]])                                           |
| :::                   | Ethernet PHY ([[http://ww1.microchip.com/downloads/en/devicedoc/00002117f.pdf|KSZ9031]])                                            |
| :::                   | MIPI® DSI->LVDS bridge ([[http://www.ti.com/lit/ds/symlink/sn65dsi83.pdf|SN65DSI83ZQER]])                                           |
| :::                   | 3-lane high-speed MIPI compatible switch ([[https://www.nxp.com/docs/en/data-sheet/NX3DV642.pdf|NX3DV642GU,115]])                   |
^ Interfaces            | 1x PCIe                                                                                                                             |
| :::                   | 2x USB OTG 2.0                                                                                                                      |
| :::                   | 1x JTAG                                                                                                                             |
| :::                   | 1x Gigabit Ethernet (from gigabit PHY)                                                                                              |
| :::                   | 1x QSPI                                                                                                                             |
| :::                   | 2x ECSPI                                                                                                                            |
| :::                   | 4x SAI                                                                                                                              |
| :::                   | 1x SPDIF                                                                                                                            |
| :::                   | 1x SD                                                                                                                               |
| :::                   | 4x UART                                                                                                                             |
| :::                   | 4x I2C                                                                                                                              |
| :::                   | 1x LVDS (MIPI DSI -> LVDS)                                                                                                          |
| :::                   | 1x MIPI CSI                                                                                                                         |
| :::                   | 14x GPIO                                                                                                                            |
^ Power supply voltage  | 3.5-5V FIXME                                                                                                                        |
^ Power consumption     | **TBD**                                                                                                                             |
^ Dimensions            | 55.2 х 30.1 mm                                                                                                                      |
</table>

<pagebreak>


===== Block Diagram =====
<WRAP centeralign nopagebreak 1200px>
<figure cardsom_imx8m_mini_BlockDiagram>
{{drawio>boards:nms-cs-imx8mini:v2_ru:cardsom_imx8m_mini_v2_BlockDiagram.drawio}}
<caption> Module block diagram </caption>
</figure>
</WRAP>
<pagebreak>


===== Power tree =====
<WRAP centeralign nopagebreak 1200px>
<figure power_cardsom_imx8mini>
{{drawio>boards:nms-cs-imx8mini:v2_ru:power_cardsom_imx8mini_v2.drawio}}
<caption> Module power tree </caption>
</figure>
</WRAP>
<pagebreak>


===== Mechanical Specifications =====

Board dimensions are: 55.2 х 30.1 mm. \\
Printed circuit of the board is made of 10 layers, some of them are ground planes, for disturbance rejection.

<WRAP centeralign nopagebreak 1200px>
<figure cardsom_imx8mini_mech>
{{ boards:nms-cs-imx8mini:v2_ru:cardsom_imx8mini_mech.png?700 |}}
<caption> Module mechanical dimensions </caption>
</figure>
</WRAP>
<pagebreak>

===== Main Hardware Components =====
==== Component Location ====
=== Top View ===

<WRAP centeralign nopagebreak 1200px>
<figure cardsom_imx8mini_top_comp>
{{ boards:nms-cs-imx8mini:v2_ru:cardsom_imx8mini_top_comp.png?600 |}}
<caption> Component Location. Top View</caption>
</figure>
</WRAP>
\\
<WRAP nopagebreak 1200px>
<table table_Components_top_side   >
<caption> Component description on the board (Top side) </caption>
{{tablelayout?colwidth="127px,233px,288px"}}
^ Designator                        ^ P/N                 ^  Description                              ^
| U1                                | K4F6E3S4HM-MGCJ000  | Memory LPDDR4                             |
| U2                                | MIMX8MM6CVTKZAA     | Processor i.MX8M Mini                     |
| U3*                               | KSZ9031RN           | Ethernet PHY                              |
| U4                                | THGAMRG7T13BAIL     | e-MMC flash                               |
| U5                                | BD71847AMWV_        | PMIC                                      |
| U6                                | 24AA025E48T-I/OT    | EEPROM                                    |
| U7*                               | WF200C              | Network Co-Processor Wi-Fi                |
| U9                                | SN65DSI83ZQER       | MIPIDSI→LVDS bridge                       |
| U10*                              | PAM2305CGFADJ       | DCDC converter 5V→1.2V                    |
| U12, U13                          | NX3DV642GU,115      | 3-lane high-speed MIPI compatible switch  |
| * - absent in this version FIXME |||
</table>
</WRAP>
\\

=== Bottom View ===

On the bottom side of the board, the components are absent.

==== Processor ====

Figure {{ref>iMX8MMini_BlockDiagram}}  shows the functional modules in the i.MX8M MINI processor system.

<WRAP centeralign nopagebreak 1200px>
<figure iMX8MMini_BlockDiagram>
{{drawio>boards:nms-cs-imx8mini:v2_ru:i.mx_8m_mini_diagram_old.drawio}}
<caption>i.MX8M Mini function modules</caption>
</figure>
</WRAP>
<pagebreak>



===== Interfaces =====

==== I2C ====

Three I2C interfaces are availbale on NMS-CS-IMX8MINI-V2. 
\\
<WRAP centeralign nopagebreak 1200px>
<figure i2c_cardsom_imx8mini>
{{drawio>boards:nms-cs-imx8mini:v2_ru:i2c_cardsom_imx8mini_v2.drawio}}
<caption> I2C interfaces </caption>
</figure>
</WRAP>
\\
<WRAP nopagebreak 1200px>
<table table_i2c_adress>
<caption> I2C Address Mapping  </caption>
{{tablelayout?colwidth="386px,273px,233px,288px"}}
^ Device                         ^ Address      ^
| MIPIDSI->2LVDS bridge          | 0x0101100  |
| EEPROM                         | 0x1010000  |
| PMIC                           | 0x1001000  |
</table>
</WRAP>
\\
<WRAP nopagebreak 1200px>
<table table_imx8mini_cardsom_v2_I2C >
<caption> I2C signal pinouts on J1-J3 connectors </caption>
^ Signal Name ^ Pin(s) ^ Direction ^ Standard volgate (V) ^ Description ^ Connection ^
| I2C2_SCL | J2.32 | in/out | 3.3\\ PU 4.7 kΩ | General purpose I2C Bus clock line.      | U2.D10 |
| I2C2_SDA | J2.30 | in/out | 3.3\\ PU 4.7 kΩ | General purpose I2C Bus data line.          | U2.D9 |
| I2C3_SCL | J3.46 | in/out | 3.3\\ PU 4.7 kΩ | General purpose I2C Bus clock line.      | U2.E10 |
| I2C3_SDA | J3.42 | in/out | 3.3\\ PU 4.7 kΩ | General purpose I2C Bus data line.          | U2.F10 |
| I2C4_SCL | J1.17 | in/out | 3.3\\ PU 4.7 kΩ | General purpose I2C Bus clock line.      | U2.D13 |
| I2C4_SDA | J1.19 | in/out | 3.3\\ PU 4.7 kΩ | General purpose I2C Bus data line.          | U2.E13 |
</table>
where PU - pull-up resistor, PD - pull-down resistor.
</WRAP>
<pagebreak>

===== Debugging/development interfaces =====

==== I2C ====

There is one I2C interface for communicating between processor and peripherals on NMS-CS-IMX8MINI-V2.
\\
<WRAP centeralign nopagebreak 1200px>
<figure cardsom_imx8mini_i2c1>
{{drawio>boards:nms-cs-imx8mini:v2_ru:cardsom_imx8mini_v2_i2c1.drawio}}
<caption> I2C1 interface </caption>
</figure>
</WRAP>
\\
<WRAP nopagebreak 1200px>
<table table_IMX8M_MINI_I2C1 >
<caption>IMX8M_MINI I2C singnals</caption>
^ Signal name  ^ Pin(s)  ^ Direction  ^ Voltage standard ^ Description  ^
| I2C1_SCL    | E9            | in/out  | 3.3 \\ PU 4.7 kΩ           | General purpose I2C Bus clock line.       |
| I2C1_SDA    | F9            | in/out  | 3.3 \\ PU 4.7 kΩ           | General purpose I2C Bus data line.           |
</table>
where PU - pull-up resistor, PD - pull-down resistor.
</WRAP>
<pagebreak>


==== RESET ====

<WRAP centeralign nopagebreak 1200px>
<figure cardsom_imx8mini_resets>
{{drawio>boards:nms-cs-imx8mini:v2_ru:cardsom_imx8mini_resets.drawio}}
<caption> Reset signals </caption>
</figure>
</WRAP>
\\
<WRAP nopagebreak 1200px>
<table table_q7_reset >
<caption>PMIC reset signals</caption>
{{tablelayout?rowsHeaderSource=Auto}}
^ Signal name  ^ Pin(s)  ^  Voltage standard(V)  ^ Circuit name  ^  Connection    ^ Description  ^
| PWRON        |  U5.40  | 1.8 \\ PU 100 kΩ      | PWRON_B       | -              | Not used     |
| POR          |  U5.25  | 1.8  \\ PU 10 kΩ      | POR_B         | U2.B24, J1.24  |              |
| :::          | :::     | :::                   | 1V8_POR_B     | U3.42, U4.K5   |              |
| RTC_RESET    |  U5.3   | 1.8 \\ PU 100 kΩ      | RTC_RESET     | U2.F4          |              |
</table>
where PU - pull-up resistor, PD - pull-down resistor.
</WRAP>
<pagebreak>

==== CLK ====

<WRAP centeralign nopagebreak 1200px>
<figure cardsom_imx8mini_clk>
{{drawio>boards:nms-cs-imx8mini:v2_ru:cardsom_imx8mini_v2_clk.drawio}}
<caption> Clock signals </caption>
</figure>
</WRAP>
\\
<WRAP nopagebreak 1200px>
<table table_J_clk >
<caption> J1 socket clock signals </caption>
^ Signal name             ^ Pin(s)        ^  Voltage Standart(V)        ^ Circuit Name    ^ Connection           ^
| GPIO1_IO00              | 1             |                             | LP_CLK          | U7.23 (through 0Ω )   |
| NAND_DATA07/QSPIB_DATA3 | 35            |                             | CLK_I_N         | U2.J27                |
| NAND_DATA06/QSPIB_DATA2 | 37            |                             | CLK_I_P         | U2.H27                |
| NAND_CLE/QSPIB_SCLK     | 45            |                             | CLK_O_P         | U2.H26                |
| NAND_CE2_B/QSPIB_SS0_B  | 47            |                             | CLK_O_N         | U2.J26                |
| PCIE1_REF_CLKN          | 51            |                             | PCIE_REF_CLK_P  | U2.B21                |
| PCIE1_REF_CLKP          | 53            |                             | PCIE_REF_CLK_N  | U2.A21                |
</table>
</WRAP>
\\

<WRAP nopagebreak 1200px>
<table table_J_clk >
<caption> J3 socket clock signals </caption>
^ Signal Name      ^ Pin(s)  ^  Voltage Standart(V)  ^ Circuit name               ^ Connection           ^
| CSI_P2_DN0      | 84            |                             | EXT_LP_CLK      | U7.23 (through 0Ω )  |
</table>
</WRAP>

<pagebreak>
===== External connectors =====

<WRAP centeralign nopagebreak 1200px>
<figure cardsom_imx8mini_top_conn>
{{ boards:nms-cs-imx8mini:v2_ru:cardsom_imx8mini_top_conn.png?600 |}}
<caption>Connectors Location. Top View</caption>
</figure>
</WRAP>
\\

^ Designator  ^ P/N	         ^ Description ^
| XW1   	           | 73412-0114 	 | Microcoaxial connector for antenna	|


<WRAP centeralign nopagebreak 1200px>
<figure cardsom_imx8mini_bot_conn>
{{ boards:nms-cs-imx8mini:v2_ru:cardsom_imx8mini_v2_bot_conn.png?600 |}}
<caption>Component Location. Bottom View</caption>
</figure>
</WRAP>
\\
^ Designator               ^ P/N	            ^ Description ^
| J1-J3	                   | DF40C-90DP-0.4V        | Composite 90-pin mezzanine connector   |


[[boards:nms-cs-imx8mini:v2_en:connectors]], [[boards:nms-cs-imx8mini:v2_en:alternatives]]
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