INMYS WIKI

Инженерами для инженеров

Инструменты пользователя

Инструменты сайта


wiki:pc:start

Различия

Показаны различия между двумя версиями страницы.

Ссылка на это сравнение

Предыдущая версия справа и слеваПредыдущая версия
Следующая версия
Предыдущая версия
wiki:pc:start [2023/01/06 15:38] Roman Abakumovwiki:pc:start [2024/04/12 13:15] (текущий) – [Таблица] Roman Abakumov
Строка 1: Строка 1:
-===== PC ======+====== PC ======
  
-/*{{ :wiki:transportation:delivery.png?480&nolink }}*/+{{ :wiki:pc:ibm_pc.png?480&nolink }}
  
-**Desktop**\\+https://en.wikipedia.org/wiki/List_of_Intel_processors 
 + 
 +https://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures 
 + 
 +https://en.wikipedia.org/wiki/List_of_Intel_chipsets 
 + 
 +https://en.wikipedia.org/wiki/List_of_Intel_codenames 
 + 
 +https://linuxreviews.org/The_Massive_Intel_Leak:_The_Files_It_Contains_And_Their_Content 
 + 
 +https://en.wikipedia.org/wiki/List_of_Intel_Xeon_chipsets 
 + 
 +https://en.wikipedia.org/wiki/List_of_Intel_Xeon_processors 
 + 
 +| CoffeTime | https://forums.overclockers.ru/viewtopic.php?f=1&t=602278&start=12640 | 
 +| Модификация UEFI BIOS. Софт для работы. | https://forums.overclockers.ru/viewtopic.php?f=25&t=479847 | 
 +| CPU microcode archive | https://www.win-raid.com/t5709f47-OFFER-Intel-CPU-Microcode-Archives.html | 
 + 
 +===== Intel x86 microarchitectures ===== 
 +{| class="wikitable floatright sortable mw-datatable" 
 +|+x86 microarchitectures 
 +! Year 
 +! Micro-<wbr />architecture 
 +! style="width:9.5em" | Pipeline stages 
 +! Max\\ clock\\ (MHz) 
 +! Process node 
 +|- 
 +| 1978 
 +| [[Intel 8086|8086]] (8086, [[Intel 8088|8088]]) 
 +| 2 
 +| 5 
 +| rowspan="2" | [[3 µm process|3000]] nm 
 +|- 
 +| 1982 
 +| [[Intel 80186|186]] (80186, [[Intel 80188|80188]]) 
 +| 2 
 +| 25 
 +|- 
 +| 1982 
 +| [[Intel 80286|286]] (80286) 
 +| 3 
 +| 25 
 +| rowspan="2" | [[1.5 µm process|1500]] nm 
 +|- 
 +| 1985 
 +| [[Intel 80386|386]] (80386) 
 +| 6 
 +| 33 
 +|- 
 +| 1989 
 +| [[Intel 80486|486]] (80486) 
 +| 5 
 +| 100 
 +| [[1 µm process|1000]] nm 
 +|- 
 +| 1993 
 +| [[P5 (microarchitecture)|P5]] (Pentium) 
 +| 5 
 +| 200 
 +| [[800 nm process|800]], [[600 nm process|600]], [[350 nm process|350]] nm 
 +|- 
 +| 1995 
 +| [[P6 (microarchitecture)|P6]] (Pentium Pro, Pentium II) 
 +| 14 (17 with load & store/retire) 
 +| 450 
 +| [[600 nm process|500]], 350, [[250 nm process|250]] nm 
 +|- 
 +| 1997 
 +| [[P5 (microarchitecture)|P5]] (Pentium MMX) 
 +| 6 
 +| 233 
 +| 350 nm 
 +|- 
 +| 1999 
 +| [[P6 (microarchitecture)#From Pentium Pro to Pentium III|P6]] (Pentium III) 
 +| 12 (15 with load & store/retire) 
 +| 1400 
 +| 250, [[180 nm process|180]], [[130 nm process|130]] nm 
 +|- 
 +| 2000 
 +| [[NetBurst]] (Pentium 4)\\ (Willamette) 
 +| rowspan="2" | 20 unified with branch prediction 
 +| 2000 
 +| 180 nm 
 +|- 
 +|2002 
 +|NetBurst (Pentium 4)\\ (Northwood, Gallatin) 
 +|3466 
 +|130 nm 
 +|- 
 +| 2003 
 +| [[Pentium M (microarchitecture)|Pentium M]] (Banias, Dothan)\\ [[Enhanced Pentium M (microarchitecture)|Enhanced Pentium M]] (Yonah) 
 +| 10 (12 with fetch/retire) 
 +| 2333 
 +|130, [[90 nm process|90]], [[65 nm process|65]] nm 
 +|- 
 +| 2004 
 +| NetBurst (Pentium 4, Pentium D)\\ ([[NetBurst#Revisions|Prescott]]) 
 +| 31 unified with branch prediction 
 +| 3800 
 +| 90, 65 nm 
 +|- 
 +| 2006 
 +| [[Intel Core (microarchitecture)|Intel Core]] 
 +| rowspan="2" | 12 (14 with fetch/retire) 
 +| 3000 
 +| 65 nm 
 +|- 
 +| 2007 
 +| [[Penryn (microarchitecture)|Penryn]] (die shrink) 
 +| 3333 
 +| rowspan="3" | [[45 nm process|45]] nm 
 +|- 
 +| rowspan="2" | 2008 
 +| [[Nehalem (microarchitecture)|Nehalem]] 
 +| 20 unified (14 without miss prediction) 
 +| 3600 
 +|- 
 +| //[[Bonnell (microarchitecture)|Bonnell]]// 
 +| 16 (20 with prediction miss) 
 +| 2100 
 +|- 
 +| 2010 
 +| [[Westmere (microarchitecture)|Westmere]] (die shrink) 
 +| 20 unified (14 without miss prediction) 
 +| 3866 
 +| rowspan="3" | [[32 nm process|32]] nm 
 +|- 
 +| rowspan="2" | 2011 
 +| //[[Saltwell (microarchitecture)|Saltwell]] (die shrink)// 
 +| 16 (20 with prediction miss) 
 +| 2130 
 +|- 
 +| [[Sandy Bridge]] 
 +| rowspan="2" | 14 (16 with fetch/retire) 
 +| 4000 
 +|- 
 +| 2012 
 +| [[Ivy Bridge (microarchitecture)|Ivy Bridge]] (die shrink) 
 +| 4100 
 +| rowspan="3" | [[22 nm process|22]] nm 
 +|- 
 +| rowspan="2" | 2013 
 +| //[[Silvermont]]// 
 +| 14–17 (16–19 with fetch/retire) 
 +| 2670 
 +|- 
 +| [[Haswell (microarchitecture)|Haswell]] 
 +| rowspan="2" | 14 (16 with fetch/retire) 
 +| 4400 
 +|- 
 +| 2014 
 +| [[Broadwell (microarchitecture)|Broadwell]] (die shrink) 
 +| 3700 
 +| rowspan="5" | [[14 nm process|14]] nm 
 +|- 
 +| rowspan="2" | 2015 
 +| //[[Airmont (microarchitecture)|Airmont]] (die shrink)// 
 +| 14–17 (16–19 with fetch/retire) 
 +| 2640 
 +|- 
 +| [[Skylake (microarchitecture)|Skylake]] 
 +| 14 (16 with fetch/retire) 
 +| 5200 
 +|- 
 +| 2016 
 +| //[[Goldmont]]// 
 +| 20 unified with branch prediction 
 +| 2600 
 +|- 
 +| 2017 
 +| //[[Goldmont Plus]]// 
 +| 20 unified with branch prediction (?) 
 +| 2800 
 +|- 
 +| 2018 
 +| [[Cannon Lake (microprocessor)|Palm Cove]] 
 +| 14 (16 with fetch/retire) 
 +| 3200 
 +| rowspan="4" | [[10 nm process|10]] nm 
 +|- 
 +| 2019 
 +| [[Sunny Cove (microarchitecture)|Sunny Cove]] 
 +| 14–20 (misprediction) 
 +| 4100 
 +|- 
 +| rowspan="2" | 2020 
 +| //[[Tremont (microarchitecture)|Tremont]]// 
 +| 20 unified  
 +|3300 
 +|- 
 +| [[Willow Cove]] 
 +| 14 unified  
 +|5300 
 +|- 
 +| rowspan="3" | 2021 
 +| [[Cypress Cove (microarchitecture)|Cypress Cove]]  
 +| 14 unified  
 +| 5300 
 +| [[14 nm process|14]] nm 
 +|- 
 +| [[Golden Cove]]  
 +| 12 unified 
 +| 5500 
 +| rowspan="3" | [[7 nm process|Intel 7]] 
 +|- 
 +| //[[Gracemont (microarchitecture)|Gracemont]]// 
 +| 20 unified with misprediction penalty  
 +| 4300 
 +|- 
 +| 2022 
 +| [[Raptor Cove]] 
 +| 12 unified 
 +| 6000 
 +|- 
 +| rowspan="2" |2023 
 +|[[Redwood Cove (microarchitecture)|Redwood Cove]] 
 +
 +
 +| rowspan="2" |[[5 nm process|Intel 4]] 
 +|- 
 +| //[[Crestmont (microarchitecture)|Crestmont]]// 
 +
 +
 +|- 
 +! colspan="5" |Note: Atom/Power efficient microarchitectures are in //Italic// 
 +|} 
 + 
 + 
 +===== Roadmap ===== 
 +{| class="wikitable sortable mw-collapsible collapsible floatleft mw-datatable" style="margin:0.5em auto; text-align:center; min-width:80em;" 
 +|+Pentium 4 / Core roadmap 
 +|- 
 +! rowspan="2" | Fabrication\\ process]] 
 +! rowspan="2" | Micro-\\ architecture 
 +! rowspan="2" | Code\\ names 
 +! rowspan="2" | Core\\ generation 
 +! rowspan="2" | Xeon\\ Scalable\\ generation 
 +! rowspan="2" | Release\\ date 
 +! colspan="5" | Processors 
 +|- 
 +Desktop 
 +! Mobile 
 +! Enthusiast\\ /WS 
 +! 2P\\ Server/WS 
 +! 4P/8P\\ Server 
 +|- 
 +| [[180 nm process|180 nm]] 
 +| rowspan="4" | [[P6 (microarchitecture)|P6]],\\ [[NetBurst]] 
 +| Willamette 
 +| colspan="2" rowspan="3" | - 
 +| 2000-11-20 
 +| Willamette 
 +| colspan="2" | - 
 +| Foster 
 +| Foster MP 
 +|- 
 +| [[130 nm process|130 nm]] 
 +| Northwood/\\ Mobile Pentium 4\\ [[Pentium M|Banias]]\\  
 +| 2002-01-07 
 +| Northwood 
 +| Northwood Mobile\\ [[Pentium M|Banias]]\\  
 +| Northwood-XE 
 +| Prestonia\\ Gallatin 
 +| Gallatin 
 +|- 
 +| [[90 nm process|90 nm]] 
 +| Prescott\\ [[Pentium M|Dothan]]\\  
 +| 2004-02-01 
 +| Prescott\\ [[Smithfield (microprocessor)|Smithfield]] 
 +| [[Pentium M|Dothan]]\\  
 +| Prescott 2M-XE\\ [[Smithfield (microprocessor)|Smithfield-XE]] 
 +| Nocona\\ Irwindale\\ Paxville 
 +| Potomac\\ Cranford\\ Paxville 
 +|- 
 +| rowspan="2" | [[65 nm process|65 nm]] 
 +| [[Pentium 4#Cedar Mill|Cedar Mill]]\\ [[Yonah (microprocessor)|Yonah]]\\ [[Presler (microprocessor)|Presler]] 
 +| Core\\ (Yonah only) 
 +| rowspan="3" | - 
 +| 2006-01-05 
 +| [[Pentium 4#Cedar Mill|Cedar Mill]]\\ [[Pentium D#Presler|Presler]] 
 +| [[Yonah (microprocessor)|Yonah]] 
 +| [[Pentium D#Presler|Presler-XE]] 
 +| [[Dempsey (microprocessor)|Dempsey]]\\ [[Sossaman (microprocessor)|Sossaman]] 
 +| [[List of Intel Xeon microprocessors#"Tulsa" (65 nm)|Tulsa]] 
 +|- 
 +| rowspan="2" | [[Intel Core (microarchitecture)|Core]] 
 +| [[Merom (microarchitecture)|Merom]] 
 +| rowspan="2" | Core 2 
 +| 2006-07-27\\  
 +| [[Conroe (microprocessor)|Conroe]] 
 +| [[Merom (microprocessor)|Merom]] 
 +| [[Kentsfield (microprocessor)|Kentsfield]] 
 +| [[Woodcrest (microprocessor)|Woodcrest]]\\ [[Clovertown (microprocessor)|Clovertown]] 
 +| [[Tigerton (microprocessor)|Tigerton]] 
 +|- 
 +| rowspan="2" | [[45 nm process|45 nm]] 
 +| [[Penryn (microarchitecture)|Penryn]] 
 +| 2007-11-11 
 +| [[Wolfdale (microprocessor)|Wolfdale]] 
 +| [[Penryn (microprocessor)|Penryn]] 
 +| [[Yorkfield]] 
 +| [[Harpertown (microprocessor)|Harpertown]] 
 +| [[Dunnington (microprocessor)|Dunnington]] 
 +|- 
 +| rowspan="2" | [[Nehalem (microarchitecture)|Nehalem]] 
 +| [[Nehalem (microarchitecture)|Nehalem]] 
 +| rowspan="2" | Previous\\ (Core i) 
 +| rowspan="7" | - 
 +| 2008-11-17\\  
 +| [[Lynnfield (microprocessor)|Lynnfield]] 
 +| [[Clarksfield (microprocessor)|Clarksfield]] 
 +| [[Bloomfield (microprocessor)|Bloomfield]] 
 +| [[List of Intel Xeon microprocessors#"Gainestown" (45 nm)|Gainestown]] 
 +| [[List of Intel Xeon microprocessors#"Beckton" (45 nm)|Beckton]] 
 +|- 
 +| rowspan="2" | [[32 nm process|32 nm]] 
 +| [[Westmere (microarchitecture)|Westmere]] 
 +| 2010-01-04\\  
 +| [[Clarkdale (microprocessor)|Clarkdale]] 
 +| [[Arrandale]] 
 +| [[Gulftown]] 
 +| [[Gulftown|Westmere-EP]] 
 +| [[Westmere-EX]] 
 +|- 
 +| rowspan="2" | [[Sandy Bridge|Sandy Bridge]] 
 +| [[Sandy Bridge|Sandy Bridge]] 
 +| 2 (Core i) 
 +| 2011-01-09\\  
 +| [[Sandy Bridge]] 
 +| [[Sandy Bridge|Sandy Bridge-M]] 
 +| [[Sandy Bridge-E]] 
 +| [[Sandy Bridge|Sandy Bridge-EP]] 
 +| - 
 +|- 
 +| rowspan="3" | [[22 nm process|22 nm]] 
 +| [[Ivy Bridge (microarchitecture)|Ivy Bridge]] 
 +| 3 
 +| 2012-04-29 
 +| [[Ivy Bridge (microarchitecture)|Ivy Bridge]] 
 +| [[Ivy Bridge (microarchitecture)|Ivy Bridge-M]] 
 +| Ivy Bridge-E\\  
 +| Ivy Bridge-EP\\  
 +| Ivy Bridge-EX\\  
 +|- 
 +| rowspan="3" | [[Haswell (microarchitecture)|Haswell]] 
 +| [[Haswell (microarchitecture)|Haswell]] 
 +| rowspan="2" | 4 
 +| 2013-06-02 
 +| Haswell-DT\\  
 +| Haswell-MB\\ Haswell-H\\ Haswell-ULP/ULX 
 +| Haswell-E 
 +| Haswell-EP 
 +| Haswell-EX 
 +|- 
 +| [[Devil's Canyon (CPU)|Devil's Canyon]] 
 +| 2014-06 
 +| Haswell-DT 
 +| colspan="4" | - 
 +|- 
 +| rowspan="10" | [[14 nm process|14 nm]] 
 +| [[Broadwell (microarchitecture)|Broadwell]] 
 +| 5 
 +| 2014-09-05 
 +| Broadwell-DT 
 +| Broadwell-H\\ Broadwell-U\\ Broadwell-Y 
 +| [[Core i7-6950X|Broadwell-E]] 
 +| Broadwell-EP 
 +| Broadwell-EX 
 +|- 
 +| rowspan="8" | [[Skylake (microarchitecture)|Skylake]] 
 +| [[Skylake (microarchitecture)|Skylake]] 
 +| 6 
 +| 1 
 +| 2015-08-05\\  
 +| Skylake-S 
 +| Skylake-H\\ Skylake-U\\ Skylake-Y 
 +| Skylake-X\\ Skylake-W 
 +| colspan="2" | Skylake-SP\\ (formerly Skylake-EP/-EX) 
 +|- 
 +| [[Kaby Lake|Kaby Lake]] 
 +| 7 / 8 
 +| rowspan="2" | - 
 +| 2016-10 
 +| Kaby Lake-S 
 +| Kaby Lake-G\\ Kaby Lake-H\\ Kaby Lake-U\\ Kaby Lake-Y 
 +| Kaby Lake-X\\ <ref name="auto" /> 
 +| colspan="2" rowspan="2" | - 
 +|- 
 +| [[Coffee Lake|Coffee Lake]] 
 +| 8 / 9 
 +| 2017-10\\  
 +| Coffee Lake-S 
 +| Coffee Lake-B\\ Coffee Lake-H\\ Coffee Lake-U 
 +| [[Coffee Lake#Workstation processors|Coffee Lake-W]] 
 +|- 
 +| [[Whiskey Lake (microprocessor)|Whiske Lake]] 
 +| 8 
 +| rowspan="2" | - 
 +| rowspan="2" | 2018-08-28 
 +| rowspan="2" | - 
 +| Whiskey Lake-U 
 +| colspan="3" rowspan="2" | - 
 +|- 
 +| [[Amber Lake (microprocessor)|Amber Lake]] 
 +| 8 / 10 
 +| Amber Lake-Y 
 +|- 
 +|[[Cascade Lake (microprocessor)|Cascade Lake]] 
 +| - 
 +| 2 
 +| 2019-04-02 
 +| colspan="2" | - 
 +| Cascade Lake-X\\ Cascade Lake-W\\ Cascade Lake-SP 
 +| colspan="2" | Cascade Lake-SP 
 +|- 
 +| [[Comet Lake|Comet Lake]] 
 +| 10 
 +| - 
 +| 2019-09 
 +| Comet Lake-S 
 +| Comet Lake-H\\ Comet Lake-U 
 +| [[Comet Lake#Workstation processors|Comet Lake-W]] 
 +| colspan="2" | - 
 +|- 
 +| [[Cooper Lake (microprocessor)|Cooper Lake]] 
 +| - 
 +| 3 
 +| 2020-06 
 +| colspan="4" | - 
 +| Cooper Lake-SP 
 +|- 
 +| [[Cypress Cove (microarchitecture)|Cypress Cove]] 
 +| [[Rocket Lake|Rocket Lake]] 
 +| 11 
 +| - 
 +| 2021-03 
 +| Rocket Lake-S 
 +| - 
 +| [[Rocket Lake#Workstation processors|Rocket Lake]] 
 +| colspan="2" | - 
 +|- 
 +| rowspan="3" | [[10 nm process|10 nm]] 
 +| [[Palm Cove (microarchitecture)|Palm Cove]] 
 +| [[Cannon Lake (microprocessor)|Cannon Lake]] 
 +| 8 
 +| - 
 +| 2018-05 
 +| rowspan="3" | - 
 +| Cannon Lake-U 
 +| colspan="3" | - 
 +|- 
 +| [[Sunny Cove (microarchitecture)|Sunny Cove]] 
 +| [[Ice Lake (microprocessor)|Ice Lake]] 
 +| 10 
 +| 3 
 +| 2019-09 (mobile)\\ 2021-04 (server) 
 +| Ice Lake-U 
 +| Ice Lake-W 
 +| Ice Lake-SP 
 +| - 
 +|- 
 +| [[Willow Cove|Willow Cove]] 
 +| [[Tiger Lake|Tiger Lake]] 
 +| 11 
 +| rowspan="2" | - 
 +| 2020-09 
 +| Tiger Lake-H\\ Tiger Lake-H35\\ Tiger Lake-UP3\\ Tiger Lake-UP4 
 +| colspan="3" rowspan="2" | - 
 +|- 
 +| rowspan="4" | [[7 nm process|Intel 7]] 
 +| rowspan="2" | [[Golden Cove|Golden Cove]] 
 +| [[Alder Lake|Alder Lake]]\\ (hybrid) 
 +| 12 
 +| 2021-11-04 
 +| Alder Lake-S 
 +| Alder Lake-H\\ Alder Lake-P\\ Alder Lake-U 
 +|- 
 +| [[Sapphire Rapids (microprocessor)|Sapphire Rapids]] 
 +| - 
 +| 4 
 +| 2023-01-10 
 +| colspan="2" | - 
 +| [[Sapphire Rapids (microprocessor)#Sapphire Rapids-WS (Workstation)|Sapphire Rapids-WS]] 
 +| colspan="2" | [[Sapphire Rapids (microprocessor)#Sapphire Rapids-SP (Server)|Sapphire Rapids-SP]] 
 +|- 
 +| rowspan="2" | [[Raptor Cove|Raptor Cove]] 
 +| [[Raptor Lake|Raptor Lake]] 
 +| 13 / 14 
 +| - 
 +| 2022-10-20 
 +| Raptor Lake-S 
 +| Raptor Lake-HX\\ Raptor Lake-H\\ Raptor Lake-P\\ Raptor Lake-U 
 +| colspan="3" | - 
 +|- 
 +| [[Emerald Rapids|Emerald Rapids]] 
 +| - 
 +| 5 
 +| 2023-12-14 
 +| colspan="2" | - 
 +| TBA 
 +| colspan="2" | Emerald Rapids--SP 
 +|- 
 +| [[5 nm process|Intel 4]] 
 +| [[Redwood Cove|Redwood Cove]] 
 +| [[Meteor Lake|Meteor Lake]] 
 +| Core Ultra\\ Series 1 
 +| - 
 +| 2023-12-14 
 +| N/A 
 +| Meteor Lake-H\\ Meteor Lake-U 
 +| colspan="3" | - 
 +|- 
 +| [[3 nm process|Intel 3]] 
 +| rowspan="4" | TBA 
 +| [[Granite Rapids|Granite Rapids]] 
 +| - 
 +| 6 
 +| 2024 
 +| colspan="2" | - 
 +| TBA 
 +| colspan="2" | Granite Rapids--SP 
 +|- 
 +| rowspan="2" | [[Intel 20A]] 
 +| [[Arrow Lake (microprocessor)|Arrow Lake]] 
 +| rowspan="3" | Core Ultra 
 +| rowspan="3" | - 
 +| 2024 
 +| colspan="2" | TBA 
 +| colspan="3" rowspan="3" | - 
 +|- 
 +| [[Lunar Lake|Lunar Lake]] 
 +| 2024 
 +| N/A 
 +| TBA 
 +|- 
 +| Intel 18A 
 +| [[Panther Lake (microprocessor)|Panther Lake]] 
 +| 2025 
 +| colspan="2" | TBA 
 +|- 
 +! rowspan="2" | Fabrication\\ process 
 +! rowspan="2" | Micro-\\ architecture 
 +! rowspan="2" | Code\\ names 
 +! rowspan="2" | Core\\ generation 
 +! rowspan="2" | Xeon\\ Scalable\\ generation 
 +! rowspan="2" | Release\\ date 
 +! Desktop 
 +! Mobile 
 +! Enthusiast\\ /WS 
 +! 2P\\ Server/WS 
 +! 4P/8P\\ Server 
 +|- 
 +! colspan="5" | Processors 
 +|} 
 + 
 + 
 +===== Atom lines ===== 
 +https://en.wikipedia.org/wiki/List_of_Intel_Atom_processors 
 + 
 + 
 +{| class="wikitable mw-collapsible collapsible floatleft mw-datatable" style="margin:0.5em auto; text-align:center; min-width:80em;" 
 +|+Atom roadmap 
 +|- 
 +! rowspan="2" | Fabri-\\ cation\\ process 
 +! rowspan="2" | Micro-\\ archi-\\ tecture 
 +! rowspan="2" | Release\\ date 
 +! colspan="8" | Processors/SoCs 
 +|- 
 +! Mobile Internet device\\ MID, smartphone 
 +! Tablet 
 +! Netbook 
 +! Nettop 
 +! Embedded 
 +! Server 
 +! Communication 
 +! Consumer Electronics, CE 
 +|- 
 +| rowspan="2" | [[45 nanometer|45 nm]] 
 +| rowspan="2" | [[Bonnell (microarchitecture)|Bonnell]] 
 +| <!-- April -->2008 
 +| [[Silverthorne (microprocessor)|Silverthorne]]<!-- Menlow --> 
 +| - 
 +| colspan="2" | [[Diamondville (microprocessor)|Diamondville]] 
 +| rowspan="2" | [[Tunnel Creek (microprocessor)|Tunnel Creek]],\\ Stellarton 
 +| rowspan="2" | - 
 +| rowspan="2" | - 
 +| [[Sodaville (SoC)|Sodaville]] 
 +|- 
 +| 2010 
 +| colspan="2" | [[Lincroft (microprocessor)|Lincroft]]<!-- Moorestown --><!-- Oak Trail --> 
 +| colspan="2" | [[Pineview (microprocessor)|Pineview]] 
 +| [[Groveland (SoC)|Groveland]] 
 +|- 
 +| [[32 nanometer|32 nm]] 
 +| [[Saltwell (microarchitecture)|Saltwell]] 
 +| <!-- November -->2011 
 +| Medfield ([[Penwell (SoC)|Penwell]] & Lexington),\\ Clover Trail+ (Cloverview)  
 +| Clover Trail ([[Cloverview (SoC)|Cloverview]])  
 +| colspan="2" | Cedar Trail ([[Cedarview (microprocessor)|Cedarview]]) 
 +| - 
 +| [[Centerton (SoC)|Centerton]] & Briarwood 
 +| - 
 +| [[Berryville (SoC)|Berryville]] 
 +|- 
 +| [[22 nanometer|22 nm]] 
 +| [[Silvermont]] 
 +| 2013 
 +| Merrifield (Tangier) 
 +| Bay Trail-T\\ (Valleyview) 
 +| Bay Trail-M\\ (Valleyview) 
 +| Bay Trail-D\\ (Valleyview) 
 +| Bay Trail-I\\ (Valleyview) 
 +| Avoton 
 +| Rangeley 
 +| - 
 +|- 
 +| rowspan="3" | [[14 nanometer|14 nm]] 
 +| [[Airmont (microarchitecture)|Airmont]] 
 +| 2014 
 +| Binghamton & Riverton 
 +| Cherry Trail-T (Cherryview) 
 +| colspan="3" | Braswell 
 +| <del>Denverton</del> 
 +| - 
 +| - 
 +|- 
 +| [[Goldmont]]\\  
 +| 2016 
 +| <del>Broxton</del> 
 +| <del>Willow Trail</del>\\ Apollo Lake 
 +| colspan="3" | [[Apollo Lake]] 
 +| Denverton 
 +| - 
 +| - 
 +|- 
 +| [[Goldmont Plus|Goldmont Plus]] 
 +| 2017 
 +| - 
 +| - 
 +| colspan="3" | [[Gemini Lake]] 
 +| - 
 +| - 
 +| - 
 +|- 
 +| [[10 nm process|10 nm]] 
 +| [[Tremont (microarchitecture)|Tremont]] 
 +| 2020 
 +| - 
 +| Lakefield (hybrid) 
 +| colspan="3" | Lakefield (hybrid) 
 +| Jacobsville\\ Parker Ridge 
 +| - 
 +| - 
 +|- 
 +| [[7 nm process|Intel 7]] 
 +| [[Gracemont (microarchitecture)|Gracemont]] 
 +| 2021 
 +| - 
 +| - 
 +| colspan="3" | [[Alder Lake]] (hybrid) 
 +| - 
 +| - 
 +| - 
 +|- 
 +| [[5 nm process#4 nm process nodes|Intel 4]] 
 +| [[Crestmont (microarchitecture)|Crestmont]] 
 +| 2023 
 +| - 
 +| - 
 +| colspan="3" | [[Meteor Lake]] (hybrid) 
 +| Grand Ridge 
 +| - 
 +| - 
 +|- 
 +| [[3 nm process|Intel 3]] 
 +| [[Crestmont (microarchitecture)|Crestmont]] 
 +| 2024 
 +| - 
 +| - 
 +| - 
 +| - 
 +| - 
 +| [[Sierra Forest|Sierra Forest-AP]] 
 +| - 
 +| - 
 +|- 
 +| [[2 nm process|Intel 20A]] 
 +| [[Skymont (2024 microarchitecture)|Skymont]] 
 +| 2024 
 +| - 
 +| - 
 +| colspan="3" | [[Arrow Lake (microprocessor)|Arrow Lake]] (hybrid) 
 +| - 
 +| - 
 +| - 
 +|- 
 +| [[1.8 nm process|Intel 18A]] 
 +| [[Darkmont (microarchitecture)|Darkmont]] 
 +| 2025 
 +| - 
 +| - 
 +| - 
 +| - 
 +| - 
 +| [[Clearwater Forest|Clearwater Forest-AP]] 
 +| - 
 +| - 
 +|} 
 + 
 +==== Tremont-Embedded-Elkhart Lake ==== 
 +List of embedded processors as follows: [[https://ark.intel.com/content/www/us/en/ark/products/codename/128825/elkhart-lake.html|Products formerly Elkhart Lake]] 
 + 
 +{{tablelayout?rowsHeaderSource=Auto&colwidth="120px,,,52px,53px,84px,,,,53px,,81px,78px,,72px,75px,84px,80px,148px,141px"&tableSort=1&tableSearch=1}} 
 +^ Part Name                                                                                                                           ^ RCP,$  ^ Price  ^ Cores\\ (threads)  ^ TDP    ^ Processor\\ branding & model  ^ TA        ^ PSE  ^ IHS  ^ IBECC  ^ TCC  ^ Target\\ segment  ^ GPU\\ model          ^ CPU clock rate\\ base  ^ CPU clock rate\\ turbo  ^ Graphics clock rate\\ base  ^ Graphics clock rate\\ turbo  ^ Memory                             ^ Ordering Code    ^ 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207909/intel-celeron-processor-j6413-1-5m-cache-up-to-3-00-ghz.html|J6413]]  | 64     | 66.4   | 4                  | 10 W   | Celeron                       | 0...70    | +    | -    | -      | -    | PC Client         | UHD Graphics  | 16 EU  | 1.8 GHz                | 3.0 GHz                 | 400 MHz                     | 800 MHz                      | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | DC8070304190822 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/214758/intel-celeron-processor-j6412-1-5m-cache-up-to-2-60-ghz.html|J6412]]  | 64     | 57.8   | 4                  | 10 W   | Celeron                       | 0...70    | -    | -    | -      | -    | PC Client         | UHD Graphics  | 16 EU  | 2.0 GHz                | 2.6 GHz                 | 400 MHz                     | 800 MHz                      | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | DC8070304190881 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207903/intel-pentium-processor-j6425-1-5m-cache-up-to-3-00-ghz.html|J6426]]  | 96            | 4                  | 10 W   | Pentium                       | 0...70    | +    | -    | -      | -    | PC Client         | UHD Graphics  | 32 EU  | 1.8 GHz                | 3.0 GHz                 | 400 MHz                     | 850 MHz                      | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | DC8070304190882 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207898/intel-celeron-processor-n6211-1-5m-cache-up-to-3-00-ghz.html|N6211]]  | 64            | 2                  | 6.5 W  | Celeron                       | 0...70    | +    | -    | -      | -    | PC Client         | UHD Graphics  | 16 EU  | 1.2 GHz                | 3.0 GHz                 | 250 MHz                     | 750 MHz                      | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | DC8070304190819 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/214754/intel-celeron-processor-n6210-1-5m-cache-up-to-2-60-ghz.html|N6210]]  | 64     | 52     | 2                  | 6.5 W  | Celeron                       | 0...70    | -    | -    | -      | -    | PC/Client/Tablet  | UHD Graphics  | 16 EU  | 1.2 GHz                | 2.6 GHz                 | 250 NHz                     | 750 MHz                      | 4 × LPDDR4X-3200\\ 2 × DDR4-3200   | DC8070304190883 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207906/intel-pentium-processor-n6415-1-5m-cache-up-to-3-00-ghz.html|N6415]]  | 96     | 102.5  | 4                  | 6.5 W  | Pentium                       | 0...70    | +    | -    | -      | -    | PC Client         | UHD Graphics  | 16 EU  | 1.2 GHz                | 3.0 GHz                 | 350 MHz                     | 800 MHz                      | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | DC8070304190820 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207905/intel-atom-x6211e-processor-1-5m-cache-up-to-3-00-ghz.html|x6211E]]   | 42     | 66.5   | 2                  | 6 W    | Atom                          | -40...85  | +    | +    | +      | -    | Embedded          | UHD Graphics  | 16 EU  | 1.2 GHz                | 3.0 GHz                 | 350 MHz                     | 750 MHz                      | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | FH8070304243807 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207908/intel-atom-x6413e-processor-1-5m-cache-up-to-3-00-ghz.html|x6413E]]   | 51     | 75     | 4                  | 9 W    | Atom                          | -40...85  | +    | +    | +      | -    | Embedded          | UHD Graphics  | 16 EU  | 1.5 GHz                | 3.0 GHz                 | 500 MHz                     | 750 MHz                      | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | FH8070304243865 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207907/intel-atom-x6425e-processor-1-5m-cache-up-to-3-00-ghz.html|x6425E]]   | 67     | 99.7   | 4                  | 12 W   | Atom                          | -40...85  | +    | +    | +      | -    | Embedded          | UHD Graphics  | 32 EU  | 1.8 GHz                | 3.0 GHz                 | 500 MHz                     | 750 MHz                      | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | FH8070304243808 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207902/intel-atom-x6212re-processor-1-5m-cache-1-20-ghz.html|x6212RE]]       | 45            | 2                  | 6 W    | Atom                          | -40...85  | +    | +    | +      | +    | Industrial        | UHD Graphics  | 16 EU  | 1.2 GHz                | -                       | 350 MHz                     | -                            | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | FH8070304243808 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/230380/intel-atom-x6214re-processor-1-5m-cache-1-40-ghz.html|x6214RE]]       | 47            | 2                  | 6 W    | Atom                          | -40...85  | +    | +    | +      | +    | Industrial        | UHD Graphics  | 16 EU  | 1.4 GHz                | -                       | 400 MHz                     | -                            | 4 × LPDDR4X-3200\\  2 × DDR4-3200  | FH8070304289531 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207901/intel-atom-x6414re-processor-1-5m-cache-1-50-ghz.html|x6414RE]]       | 55            | 4                  | 9 W    | Atom                          | -40...85  | +    | +    | +      | +    | Industrial        | UHD Graphics  | 16 EU  | 1.5 GHz                | -                       | 400 MHz                     | -                            | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | FH8070304289591 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/230379/intel-atom-x6416re-processor-1-5m-cache-1-70-ghz.html|x6416RE]]       | 63            | 4                  | 9 W    | Atom                          | -40...85  | +    | +    | +      | +    | Industrial        | UHD Graphics  | 16 EU  | 1.7 GHz                | -                       | 450 MHz                     | -                            | 4 × LPDDR4X-3200\\  2 × DDR4-3200  | FH8070304289532 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207899/intel-atom-x6425re-processor-1-5m-cache-1-90-ghz.html|x6425RE]]       | 71            | 4                  | 12 W   | Atom                          | -40...85  | +    | +    | +      | +    | Industrial        | UHD Graphics  | 32 EU  | 1.9 GHz                | -                       | 400 MHz                     | -                            | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | FH8070304289558 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207900/intel-atom-x6427fe-processor-1-5m-cache-1-90-ghz.html|x6427FE]]       | 83            | 4                  | 12 W   | Atom                          | -40...85  | +    | +    | +      | +    | FuSa Industrial   | UHD Graphics  | 32 EU  | 1.9 GHz                | -                       | 400 MHz                     | -                            | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | FH8070304289690 
 +| [[https://ark.intel.com/content/www/us/en/ark/products/207904/intel-atom-x6200fe-processor-1m-cache-1-00-ghz.html|x6200FE]]         | 45            | 2                  | 4.5 W  | Atom                          | -40...85  | +    | +    | +      | +    | FuSa Industrial   | -             | -      | 1.0 GHz                | -                       | -                           | -                            | 4 × LPDDR4X-4267\\ 2 × DDR4-3200   | FH8070304289582 
 + 
 + 
 + 
 + 
 +===== Motherboards ===== 
 +| supermicro | x13dai-t | [[https://www.supermicro.com/en/products/motherboard/x13dai-t|page]] | [[|datasheet]] | 
 + 
 + 
 +===== Desktop processors =====
 {{tablelayout?rowsHeaderSource=Auto&colwidth=""}} {{tablelayout?rowsHeaderSource=Auto&colwidth=""}}
 ^ Codename  ^ Desktop Name                                                            ^ Socket Name                     ^ Gen  ^   ^ ^ Codename  ^ Desktop Name                                                            ^ Socket Name                     ^ Gen  ^   ^
Строка 14: Строка 753:
 | ADL       | [[https://en.wikipedia.org/wiki/Alder_Lake|Alder Lake]]                 | LGA 1700                        | 12     | | ADL       | [[https://en.wikipedia.org/wiki/Alder_Lake|Alder Lake]]                 | LGA 1700                        | 12     |
 | RPL       | [[https://en.wikipedia.org/wiki/Raptor_Lake|Raptor Lake]]               | LGA 1700                        | 13     | | RPL       | [[https://en.wikipedia.org/wiki/Raptor_Lake|Raptor Lake]]               | LGA 1700                        | 13     |
 +| MTL       | [[|Meteor Lake]] | | |
  
-**PCH**\\+===== PCH =====
 ^ PCH Name           ^ Chipset Series ^ ^ PCH Name           ^ Chipset Series ^
 | [[|Ibex Peak]]     | 5   | Lynnfield and Clarkdale | https://en.wikipedia.org/wiki/Intel_5_Series | | [[|Ibex Peak]]     | 5   | Lynnfield and Clarkdale | https://en.wikipedia.org/wiki/Intel_5_Series |
Строка 29: Строка 769:
 |                    | 700 | Raptor Lake | https://en.wikipedia.org/wiki/LGA_1700#Raptor_Lake_chipsets_(700_series) | |                    | 700 | Raptor Lake | https://en.wikipedia.org/wiki/LGA_1700#Raptor_Lake_chipsets_(700_series) |
  
-https://en.wikipedia.org/wiki/List_of_Intel_processors+===== Embedded controller ===== 
 +https://github.com/intel/ecfw-zephyr
  
-https://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures 
  
-https://en.wikipedia.org/wiki/List_of_Intel_chipsets+===== BIOS ===== 
 +https://www.sentinelone.com/labs/moving-from-common-sense-knowledge-about-uefi-to-actually-dumping-uefi-firmware/
  
-https://en.wikipedia.org/wiki/List_of_Intel_codenames+https://malware.news/t/moving-from-manual-reverse-engineering-of-uefi-modules-to-dynamic-emulation-of-uefi-firmware/43799
  
-https://linuxreviews.org/The_Massive_Intel_Leak:_The_Files_It_Contains_And_Their_Content+https://edk2-docs.gitbook.io/edk-ii-uefi-driver-writer-s-guide/ 
 + 
 +https://github.com/LongSoft/UEFITool 
 + 
 +https://github.com/LongSoft/UEFITool/blob/new_engine/common/guids.csv 
 + 
 +https://github.com/theopolis/uefi-firmware-parser 
 + 
 +https://github.com/erocarrera/pefile 
 + 
 +https://formats.kaitai.io/uefi_te/python.html 
 + 
 +https://github.com/intel/FSP 
 + 
 +===== DEBUG ===== 
 +https://github.com/ptresearch/IntelTXE-PoC/blob/master/README.md 
 + 
 +http://standa-note.blogspot.com/2021/03/debugging-system-with-dci-and-windbg.html 
 + 
 +===== APIC ===== 
 +https://wiki.osdev.org/APIC 
 + 
 +Intel® 64 and IA-32 Architectures Software Developer’s Manual 
 + 
 +| [[https://doc.inmys.ru/open?hash=a8aa01e97aab2075ff7a13f0c843bba0&fn=253665-sdm-vol-1.pdf|Volume 1: Basic Architecture]] | 
 +| [[https://doc.inmys.ru/open?hash=93e0f0526b7c2fe94f5b6a104682d2fb&fn=253666-sdm-vol-2a.pdf|Volume 2A: Instruction Set Reference, A-L]] | 
 +| [[https://doc.inmys.ru/open?hash=1b40a58479163e0d1e528abd7b21761f&fn=253667-sdm-vol-2b.pdf|Volume 2B: Instruction Set Reference, M-U]] | 
 +| [[https://doc.inmys.ru/open?hash=4c8aedaedfc017410e850c52c6b51367&fn=326018-sdm-vol-2c.pdf|Volume 2C: Instruction Set Reference, V]] | 
 +| [[https://doc.inmys.ru/open?hash=b991ccf3913ff8a44f196128119bb73d&fn=334569-sdm-vol-2d.pdf|Volume 2D:Instruction Set Reference, W-Z]] | 
 +| [[https://doc.inmys.ru/open?hash=4c5525eeec015a04c08e8a15aabfbd5a&fn=253668-sdm-vol-3a.pdf|Volume 3A: System Programming Guide, Part 1]] | 
 +| [[https://doc.inmys.ru/open?hash=b5e230be3fb5c1faee9a8967373c20bd&fn=253669-sdm-vol-3b.pdf|Volume 3B: System Programming Guide, Part 2]] | 
 +| [[https://doc.inmys.ru/open?hash=0cc0bd458fd3842dec68f44a6398f1dd&fn=326019-sdm-vol-3c.pdf|Volume 3C: System Programming Guide, Part 3]] | 
 +| [[https://doc.inmys.ru/open?hash=fce54bc6e0335a1003b215e466c3ab70&fn=332831-sdm-vol-3d.pdf|Volume 3D: System Programming Guide, Part 4]] | 
 +| [[https://doc.inmys.ru/open?hash=6a533d55ca4655739571c1fbfe0f6407&fn=335592-sdm-vol-4.pdf|Volume 4: Model-Specific Registers]] | 
 + 
 +| [[https://doc.inmys.ru/open?hash=35b2d02bfe1fc096218c500e21e07cd3&fn=24201606.pdf|MultiProcessor Specification]] | 
 + 
 +===== Acronyms ===== 
 +https://doc.coreboot.org/acronyms.html
  
-| ACM  | | | |+| ACM  | Authenticated Code Modules                          | | https://doc.coreboot.org/security/intel/acm.html |
 | ACPI | Advanced Configuration and Power Interface          | | https://en.wikipedia.org/wiki/ACPI | | ACPI | Advanced Configuration and Power Interface          | | https://en.wikipedia.org/wiki/ACPI |
-| AL   | After life                                          | phase UEFI boot | |+| AL   | After life                                          | UEFI boot phase | | 
 +| AMT  | Active Management Technology                        | https://en.wikipedia.org/wiki/Intel_Active_Management_Technology |
 | APIC | Advanced Programmable Interrupt Controller          | | https://en.wikipedia.org/wiki/Advanced_Programmable_Interrupt_Controller | | APIC | Advanced Programmable Interrupt Controller          | | https://en.wikipedia.org/wiki/Advanced_Programmable_Interrupt_Controller |
 | ARM  | Advanced RISC Machines                              | | https://en.wikipedia.org/wiki/ARM_architecture_family | | ARM  | Advanced RISC Machines                              | | https://en.wikipedia.org/wiki/ARM_architecture_family |
-| BDS  | Boot Device Selection                               phase UEFI boot | |+| BDS  | Boot Device Selection                               | UEFI boot phase | | 
 +| BFV  | Boot Firmware Volume                                | UEFI | |
 | BIOS | Basic Input/Output System                           | | https://en.wikipedia.org/wiki/BIOS | | BIOS | Basic Input/Output System                           | | https://en.wikipedia.org/wiki/BIOS |
 | BKC  | Best Known Configuration                            | | | | BKC  | Best Known Configuration                            | | |
 +| BMC  | Baseboard management controller                     | | https://en.wikipedia.org/wiki/Intelligent_Platform_Management_Interface#Baseboard_management_controller |
 +| BTX  | Balanced Technology Extended Interface              | intel | |
 | CAR  | Cache-as-RAM                                        | | | | CAR  | Cache-as-RAM                                        | | |
 +| CBFS | coreboot file system                                | coreboot | |
 | CCT  | Intel® Clock Commander                              | Tool found in BKC Intel® CSME kit | | | CCT  | Intel® Clock Commander                              | Tool found in BKC Intel® CSME kit | |
 | CDI  | | | | | CDI  | | | |
 | CPU  | Central processing unit                             | | https://en.wikipedia.org/wiki/Central_processing_unit | | CPU  | Central processing unit                             | | https://en.wikipedia.org/wiki/Central_processing_unit |
-| CSME | | | |  +| CSME | Converged Security and Management Engine            intel | |  
-| DMI  | Direct Media Interface                              | | https://en.wikipedia.org/wiki/Direct_Media_Interface | +| DMI  | Direct Media Interface                              | intel | https://en.wikipedia.org/wiki/Direct_Media_Interface 
-| DXE  | The Driver Execution Environment                    | phase UEFI boot | |+| DTS  | digital thermal sensors                             | | 
 +| DXE  | The Driver Execution Environment                    | UEFI boot phase | |
 | EC   | Embedded controller                                 | | https://en.wikipedia.org/wiki/Embedded_controller | | EC   | Embedded controller                                 | | https://en.wikipedia.org/wiki/Embedded_controller |
 | EOP  | End-of-POST                                         | Message | | | EOP  | End-of-POST                                         | Message | |
-| FDI  | Flexible Display Interface                          | | https://en.wikipedia.org/wiki/Flexible_Display_Interface | +| FDI  | Flexible Display Interface                          | intel | https://en.wikipedia.org/wiki/Flexible_Display_Interface 
-| FIT  | Intel® Flash Image Tool                             | | |+| FFS  | Firmware File System                                | UEFI | 
 +| FIT  | Intel® Flash Image Tool                             intel | | 
 +| FV   | firmware volume                                     | UEFI | |
 | GOP  | | | | | GOP  | | | |
-| HID  | | | | +| GUID | Globally Unique Identifier                          | | | 
-| HLK  |                                                     | HLK Validation | |+| HECI | Host Embedded Controller Interface                  | | https://en.wikipedia.org/wiki/Host_Embedded_Controller_Interface | 
 +| HID  | Human interface device                              | | https://en.wikipedia.org/wiki/Human_interface_device 
 +| HLK  |                                                     intel HLK Validation | | 
 +| HOB  | Hand-Off Block                                      | | | 
 | HSIO | High Speed Input/Output                             | | | | HSIO | High Speed Input/Output                             | | |
 +| IBB  | Initial Boot Block                                  | coreboot | https://doc.coreboot.org/security/intel/txt_ibb.html |
 | ICH  | I/O Controller Hub                                  | | https://en.wikipedia.org/wiki/I/O_Controller_Hub | | ICH  | I/O Controller Hub                                  | | https://en.wikipedia.org/wiki/I/O_Controller_Hub |
 +| ILM  | Independent Loading Mechanism                       | intel mb | |
 | IOC  | Intel Online Connect                                | | | | IOC  | Intel Online Connect                                | | |
 | IPC  | Instructions per cycle                              | | https://en.wikipedia.org/wiki/Instructions_per_cycle | | IPC  | Instructions per cycle                              | | https://en.wikipedia.org/wiki/Instructions_per_cycle |
 | IRQ  | Interrupt request                                   | | https://en.wikipedia.org/wiki/Interrupt_request_(PC_architecture) | | IRQ  | Interrupt request                                   | | https://en.wikipedia.org/wiki/Interrupt_request_(PC_architecture) |
 | ITSS | interrupt and timer subsystem                       | | | | ITSS | interrupt and timer subsystem                       | | |
 +| KOZ  | Keepout Zones                                       | intel mb | |
 | KSC  | | | | | KSC  | | | |
 | ME   | Intel Management Engine                             | | https://en.wikipedia.org/wiki/Intel_Management_Engine | | ME   | Intel Management Engine                             | | https://en.wikipedia.org/wiki/Intel_Management_Engine |
Строка 73: Строка 866:
 | OPI  | On Package DMI interconnect Interface               | | | | OPI  | On Package DMI interconnect Interface               | | |
 | PCH  | Platform Controller Hub                             | | https://en.wikipedia.org/wiki/Platform_Controller_Hub | | PCH  | Platform Controller Hub                             | | https://en.wikipedia.org/wiki/Platform_Controller_Hub |
 +| PCL  | Platform Component List                             | intel | |
 | PCT  | Intel® Platform Configuration Tool                  | | | | PCT  | Intel® Platform Configuration Tool                  | | |
 | PD   | Power Delivery                                      | | | | PD   | Power Delivery                                      | | |
 | PE   | Portable Executable                                 | file format | | | PE   | Portable Executable                                 | file format | |
-| PEI  | The Pre-EFI Initialization                          | phase UEFI boot | |+| PECI | Platform Environment Control Interface              | | https://en.wikipedia.org/wiki/Platform_Environment_Control_Interface | 
 +| PEI  | The Pre-EFI Initialization                          | UEFI boot phase | | 
 +| PEIM | Pre-EFI Initialization Module                       | UEFI | |
 | PFAT | | | |  | PFAT | | | | 
-| PMC  | | | | +| PMC  | Power Management Controller                         intel | |  
 +| PPI  | PEIM-to-PEIM Interface                              | UEFI | | 
 | PV   | Production Version                                  | | | | PV   | Production Version                                  | | |
-| RT   | runtime                                             phase UEFI boot | |+| RT   | runtime                                             | UEFI boot phase | |
 | SCH  | System Controller Hub                               | | https://en.wikipedia.org/wiki/System_Controller_Hub | | SCH  | System Controller Hub                               | | https://en.wikipedia.org/wiki/System_Controller_Hub |
 | SEC  | Security phase                                      | | | | SEC  | Security phase                                      | | |
-| SKU  | | | |  +| SKU  | Stock Keeping Unit                                  common | |  
-| SPI  | | | |  +| SPI  | Serial Peripheral Interface                         common https://en.wikipedia.org/wiki/Serial_Peripheral_Interface |  
-| TE   | Terse Executable                                    | file format is a stripped-down version of the PE format | | +| TE   | Terse Executable                                    | UEFI file format is a stripped-down version of the PE format | https://uefi.org/sites/default/files/resources/PI_Spec_1_6.pdf | 
-| TSL  | Transient System Load                               phase UEFI boot | | +| TPM  | Trusted Platform Module                             | | 
-| TXT  | | | |+| TSL  | Transient System Load                               | UEFI boot phase | | 
 +| TXT  | Intel Trusted Execution Technology                  | | https://doc.coreboot.org/security/intel/txt.html |
 | UEFI | Unified Extensible Firmware Interface               | | https://en.wikipedia.org/wiki/UEFI | | UEFI | Unified Extensible Firmware Interface               | | https://en.wikipedia.org/wiki/UEFI |
 | VIP  | Intel® Validation Internet Portal                   | | | | VIP  | Intel® Validation Internet Portal                   | | |
  
-===== BIOS ===== 
-https://www.sentinelone.com/labs/moving-from-common-sense-knowledge-about-uefi-to-actually-dumping-uefi-firmware/ 
-https://malware.news/t/moving-from-manual-reverse-engineering-of-uefi-modules-to-dynamic-emulation-of-uefi-firmware/43799 
  
-https://github.com/LongSoft/UEFITool+{{indexmenu>.#2|skipfile+/index|startnsort tsort}}
  
-https://github.com/LongSoft/UEFITool/blob/new_engine/common/guids.csv +{{tag>bios x86 uefi fsp apic}}
- +
-https://github.com/theopolis/uefi-firmware-parser +
- +
-https://github.com/erocarrera/pefile +
- +
-{{indexmenu>.#2|skipfile+/index|start/ nsort tsort}}+
wiki/pc/start.1673008729.txt.gz · Последнее изменение: 2023/01/06 15:38 — Roman Abakumov