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--- wiki:cmp:fpga:start [2022/03/16 10:17] – создано Roman Abakumov
+++ wiki:cmp:fpga:start [2023/11/25 11:54] (текущий) – Roman Abakumov
@@ Строка 1: / Строка 1: @@
+====== FPGA ======
+===== Ссылки =====
+| Библиотека\набор IP ядер LiteX (python) | https://github.com/enjoy-digital/litex \\ https://habr.com/ru/articles/594817/ \\ https://github.com/litex-hub \\ https://fpga-systems.ru/share/conference/2020/fpga-systems-2020-kaushan.pdf |
+| Язык описания регистров SystemRDL | https://www.accellera.org/downloads/standards/systemrdl \\ https://github.com/SystemRDL \\ https://en.wikipedia.org/wiki/SystemRDL \\ https://www.accellera.org/images/downloads/standards/systemrdl/SystemRDL_2.0_Jan2018.pdf |
 ===== FPGA Intel =====
-| [[wiki:cmp:fpga_intel:start|FPGA Intel]] | https://www.intel.com/content/www/us/en/products/programmable.html | Altera, USA |
+| [[wiki:cmp:fpga:intel:start|FPGA Intel]] | https://www.intel.com/content/www/us/en/products/programmable.html | Altera, USA |
@@ Строка 16: / Строка 21: @@
 ===== FPGA Gowin =====
-| | https://www.gowinsemi.com/en/ | China |
+| [[wiki:cmp:fpga:gowin:start|FPGA Gowin]] | https://www.gowinsemi.com/en/ | China |