===== eSPI ===== {{tablelayout?rowsHeaderSource=Auto}} | Enhanced SPI Master Bus Functional Model | https://github.com/akaeba/eSpiMasterBfm | | Intel/Altera eSPI to LPC Bridge Core | https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf | | Intel eSPI Specification | https://www.intel.com/content/dam/support/us/en/documents/software/chipset-software/327432-004_espi_base_specification_rev1.0_cb.pdf | | SmartDV eSPI Slave IIP | https://www.smart-dv.com/iip/espi_slave.html | | eSPI protocol | https://www.prodigytechno.com/espi-protocol | | IT8883E-I | ITE | eSPI to LPC Bridge | [[|link]] | | ECE1200 | Microchip | eSPI to LPC Bridge | [[https://doc.inmys.ru/hash/06628f6babe5eaf455132f4ffc309704/ECE1200.pdf|link]] | {{indexmenu>.#2|skipfile+/index|start/ nsort tsort}}